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김진국

Kim, Jingook
Integrated Circuit and Electromagnetic Compatibility Lab.
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dc.citation.endPage 1141 -
dc.citation.number 8 -
dc.citation.startPage 1129 -
dc.citation.title IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY -
dc.citation.volume 5 -
dc.contributor.author Kim, Jingook -
dc.contributor.author Lee, Jongjoo -
dc.contributor.author Park, Eunkyeong -
dc.contributor.author Park, Youngwoo -
dc.date.accessioned 2023-12-22T01:06:29Z -
dc.date.available 2023-12-22T01:06:29Z -
dc.date.created 2015-09-03 -
dc.date.issued 2015-08 -
dc.description.abstract Statistical link analysis methods were previously developed for effective computation of bit error rate due to intersymbol interference (ISI). In addition to ISI, supply voltage fluctuations at output drivers can cause jitter and amplitude uncertainty in I/O links. In this paper, the enhanced statistical link analysis method considering both ISI and supply voltage fluctuations is clearly reformulated and experimentally validated step by step by various measurements. A silicon integrated circuit (IC) is designed, fabricated, and assembled on a manufactured printed circuit board (PCB). The supply voltage fluctuations on the IC with regard to the receiver reference voltage are extracted from measurements at the IC and PCB. Also, the impulse response of the total output channel is extracted from the measurements of the driver and channel characteristics. The statistical eye diagrams of the channel output including both ISI effects and the supply voltage fluctuations are then calculated and validated by comparison with the direct eye measurements. -
dc.identifier.bibliographicCitation IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.5, no.8, pp.1129 - 1141 -
dc.identifier.doi 10.1109/TCPMT.2015.2450723 -
dc.identifier.issn 2156-3950 -
dc.identifier.scopusid 2-s2.0-85027923925 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/17207 -
dc.identifier.url http://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=7173030&sortType%3Dasc_p_Sequence%26filter%3DAND(p_Publication_Number%3A5503870)%26rowsPerPage%3D100 -
dc.identifier.wosid 000360018200011 -
dc.language 영어 -
dc.publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC -
dc.title An Enhanced Statistical Analysis Method for I/O Links Considering Supply Voltage Fluctuations and Inter-Symbol-Interference -
dc.type Article -
dc.description.isOpenAccess FALSE -
dc.relation.journalWebOfScienceCategory Engineering, Manufacturing; Engineering, Electrical & Electronic; Materials Science, Multidisciplinary -
dc.relation.journalResearchArea Engineering; Materials Science -
dc.description.journalRegisteredClass scie -
dc.description.journalRegisteredClass scopus -
dc.subject.keywordAuthor Bit error rate (BER) -
dc.subject.keywordAuthor linear driver -
dc.subject.keywordAuthor power distribution network (PDN) -
dc.subject.keywordAuthor power-supply voltage fluctuations -
dc.subject.keywordAuthor power-supply-induced jitter -
dc.subject.keywordAuthor probability density function (PDF) -
dc.subject.keywordAuthor signal integrity -
dc.subject.keywordAuthor statistical link analysis -
dc.subject.keywordPlus CLOSED-FORM EXPRESSIONS -
dc.subject.keywordPlus POWER -
dc.subject.keywordPlus SIMULATION -

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