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김재준

Kim, Jae Joon
Circuits & Systems Design Lab.
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DC Field Value Language
dc.citation.endPage 1053 -
dc.citation.number 6 -
dc.citation.startPage 1047 -
dc.citation.title IEICE TRANSACTIONS ON ELECTRONICS -
dc.citation.volume E87-C -
dc.contributor.author Ahn, Hyung Ki -
dc.contributor.author Lim, Kyoohyun -
dc.contributor.author Park, Chan-Hong -
dc.contributor.author Kim, Jae Joon -
dc.contributor.author Kim, Beomsup -
dc.date.accessioned 2023-12-22T11:06:10Z -
dc.date.available 2023-12-22T11:06:10Z -
dc.date.created 2015-01-09 -
dc.date.issued 2004-06 -
dc.description.abstract A fully integrated RF front-end for W-CDMA applications including a low noise amplifier, a down conversion mixer, a digitally programmable gain amplifier, an on-chip VCO, and a fractional-N frequency synthesizer is designed using a 0.35-µm CMOS process. A multi-stage ring shaped on-chip LC-VCO exhibiting bandpass characteristics overcomes the limitation of low-Q components in the tank circuits and improves the phase noise performance. The measured phase noise of the on-chip VCO is -134 dBc/Hz at 1 MHz offset. The receiver RF front-end achieves a NF of 3.5 dB, an IIP3 of -16 dBm, and a maximum gain of 80 dB. The receiver consumes 52 mA with a 3-V supply and occupies only 2 mm2 die area with minimal external components. -
dc.identifier.bibliographicCitation IEICE TRANSACTIONS ON ELECTRONICS, v.E87-C, no.6, pp.1047 - 1053 -
dc.identifier.issn 1745-1353 -
dc.identifier.scopusid 2-s2.0-3042686974 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/10047 -
dc.identifier.wosid 000221983000033 -
dc.language 영어 -
dc.publisher IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG -
dc.title A Fully Integrated CMOS RF Front-End with On-Chip VCO for W-CDMA Applications -
dc.type Article -
dc.description.isOpenAccess FALSE -
dc.description.journalRegisteredClass scie -

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