dc.citation.endPage |
1089 |
- |
dc.citation.number |
4 |
- |
dc.citation.startPage |
1084 |
- |
dc.citation.title |
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
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dc.citation.volume |
E88-A |
- |
dc.contributor.author |
Kim, Jae Joon |
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dc.contributor.author |
Lim, Jae Sang |
- |
dc.contributor.author |
Kim, Beomsup |
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dc.date.accessioned |
2023-12-22T10:37:07Z |
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dc.date.available |
2023-12-22T10:37:07Z |
- |
dc.date.created |
2015-01-09 |
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dc.date.issued |
2005-04 |
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dc.description.abstract |
A novel CMOS LC oscillator architecture combining an LC tuned oscillator and a ring structure is presented as a new design topology to deliver improved phase noise for multiphase applications. The relative enhancement in the phase noise is estimated using a linear noise modeling approach. A three-stage LC-ring oscillator fabricated in a 0.6 mm CMOS technology achieves measured phase noise of -132 dBc/Hz at 600 kHz offset from a 900 MHz carrier and dissipates 20 mW with a 2.5 V power supply. |
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dc.identifier.bibliographicCitation |
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E88-A, no.4, pp.1084 - 1089 |
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dc.identifier.doi |
10.1093/ietfec/e88-a.4.1084 |
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dc.identifier.issn |
0916-8508 |
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dc.identifier.scopusid |
2-s2.0-24144469855 |
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dc.identifier.uri |
https://scholarworks.unist.ac.kr/handle/201301/10046 |
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dc.identifier.wosid |
000228412600036 |
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dc.language |
영어 |
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dc.publisher |
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG |
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dc.title |
Analysis and Design of Multistage Low-Phase-Noise CMOS LC-Ring Oscillators |
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dc.type |
Article |
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dc.description.isOpenAccess |
FALSE |
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dc.description.journalRegisteredClass |
scie |
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dc.description.journalRegisteredClass |
scopus |
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