Repository Collection:

A Highly Energy-efficient and High-density Hybrid-domain Computing-in-memory AI Accelerator

2026-03-26T13:13:53Z

Title: A Highly Energy-efficient and High-density Hybrid-domain Computing-in-memory AI Accelerator Author(s): Jeong, Hoichang Abstract: As artificial intelligence (AI) becomes increasingly integral to daily life, the demand for high- performance Deep Neural Networks (DNNs) on edge devices has surged. However, deployment is constrained by the "memory wall" in traditional von Neumann architectures, where massive data movement leads to excessive energy consumption and latency. While Computing-in-Memory (CIM) has emerged as a promising paradigm to mitigate these bottlenecks, existing embedded DRAM (eDRAM) implementations face critical challenges. These include low memory density, susceptibility to process, voltage, and temperature (PVT) variations, substantial ADC overhead, and an inability to effectively exploit data sparsity. This thesis addresses these limitations by proposing two novel analog- digital hybrid eDRAM CIM processors designed for high-density and high-energy-efficiency AI acceleration. First, leveraging the distinct advantages of Ternary Neural Networks (TNNs) in image classification, this work presents HYTEC. HYTEC features a novel transpose ternary eDRAM bitcell with a 3T1C gain-cell structure, achieving 1.58 Mb/mm² density without requiring additional in-cell logic. To resolve inherent analog MAC non-linearity, a Bitcell Gate Voltage Biasing (BGB) scheme dynamically compensates for PVT variations, reducing MAC variation by 89%. Additionally, the processor incorporates a Ternary-bit Per Cycle (TPC) SAR ADC with a shared capacitor DAC to minimize area overhead, alongside an IC-first tiled-convolution strategy. Fabricated in 28 nm CMOS, HYTEC achieves macro and system energy efficiencies of 478 TOPS/W and 273.48 TOPS/W, demonstrating that high density and robust analog computation can coexist. Furthermore, to extend applicability beyond the limited scope of TNNs and maximize energy efficiency for general-purpose multi-bit DNNs by leveraging unstructured sparsity, this thesis proposes SERAH-CIM. This processor introduces a novel Input Activation Grouping Convolution (IGC) scheme that reorders computation sequences to activate only effective rows, skipping zero-weight computations and improving the effective computation ratio by 4.59×. Supporting this is a Hybrid Reversed-MAC Macro (HRMM) capable of dynamically switching between analog and digital modes, coupled with a SAR-Flash ADC. At the system level, Sparsity-aware Proactive Scheduling (SPS) and Multi-Row- Multi-Task (MRMT) control resolve workload imbalances and enable concurrent refresh/update. Consequently, SERAH-CIM achieves a 10.37× improvement in energy efficiency for VGGNet-16 compared to state-of-the-art processors, successfully bridging the gap between theoretical CIM advantages and practical, sparsity-aware hardware implementation. Major: Department of Electrical Engineering

Jueun Jung

2026-03-26T13:13:52Z

Title: Jueun Jung Author(s): Jung, Jueun Abstract: With recent advances in AI-based autonomous driving technology, accurate perception and stable decision-making based on spatio-temporal sensor data have become essential for mobile robots operating in complex and unstructured environments. However, the deep learning and spatio-temporal processing algorithms that enable these capabilities are dominated by memory-intensive and compute-intensive operations. Conventional general-purpose computing platforms struggle to satisfy these requirements under strict real-time and power constraints. This paper presents two energy-efficient domain-specific processors for autonomous mobile robots through hardware–algorithm co-design: a semantic LiDAR SLAM processor (LSPU) and a multi-modal end-to-end driving processor (ABNP), both fabricated in 28-nm CMOS technology. The first processor, LSPU, is a dedicated accelerator for real-time semantic LiDAR SLAM that integrates spatial perception, localization, and mapping into a single hardware platform. To efficiently support the heterogeneous workloads of k-nearest neighbor (kNN) search, point neural network (PNN) inference, and non-linear optimization, the LSPU adopts a heterogeneous multi-core architecture composed of five specialized accelerators. A LiDAR-optimized spherical bin–based searching scheme combined with spatio-temporal-aware computing alleviates external memory bottlenecks in kNN operations. In addition, a two-stage global point-level task scheduler improves PNN core utilization under irregular point distributions. The LSPU further incorporates a dynamic point removal–based keypoint extraction core and a reconfigurable non-linear optimization core that supports keypoint-level pipelining and parallel matrix computation. Consequently, the LSPU achieves real-time semantic LiDAR SLAM with a processing latency of 20.7 ms and an energy consumption of 17.48 mJ per frame. The second processor, ABNP, accelerates the complete end-to-end autonomous driving pipeline, from multi-modal sensor fusion to planning and control. To handle severe layer-wise sparsity variations in hybrid CNN/Transformer–based multi-modal driving models, ABNP introduces a sparsity reasoning unit that exploits spatio-temporal correlations across past, current, and predicted future frames to dynamically reorganize heterogeneous sparse and dense cores. Moreover, a long-/short-term memory unit with progressive memory pruning significantly reduces the external memory overhead of temporal attention. As a result, ABNP achieves real-time end-to-end driving at 10.3 frames per second with an energy consumption of 71.3 mJ per frame, demonstrating 218× higher energy efficiency than a state-of-the-art autonomous driving computing platform. Major: Department of Electrical Engineering

Ultrawideband Antenna Arrays for Frequency Invariant Beamforming

2026-03-26T13:13:51Z

Title: Ultrawideband Antenna Arrays for Frequency Invariant Beamforming Author(s): Yu, Taeho Abstract: Beamforming is a technique based on the concept of a spatial filter that concentrates electromagnetic energy in a specific direction by controlling the amplitude and phase of array antenna elements. Ow- ing to these characteristics, beamforming has become a key technology in 5G/6G communications, satellite communications, and electronic warfare (EW) systems. In particular, in EW systems, it is es- sential to operate over a wide frequency range to detect signals radiated at unknown frequencies, and thus beamforming must also maintain wideband operation. However, when array antennas are operated over a wide bandwidth, the beam pattern varies with frequency, which necessitates frequency-dependent control schemes. Typically, an array antenna is designed with half-wavelength spacing at the highest operating frequency to suppress sidelobes. As the frequency increases, the electrical aperture size de- creases, resulting in a narrower beam pattern at high frequency. While a narrow beam provides high gain by concentrating radiated energy, it also requires a larger number of beams to cover a given angular sector during beam scanning. To address this limitation, frequency-invariant beamforming algorithms is applied. Furthermore, to enable reliable wideband direction finding, wideband array antennas and a wide hardware architecture capable of supporting such operation are designed. First, we investigate array-optimization methods for designing wideband array antennas. The frequency- invariant beam algorithm requires a larger number of antenna elements as the operating frequency in- creases, which leads to significant cost and spatial complexity. In particular, for the ultrawideband fre- quency range of 2–18 GHz (9:1), commonly employed in EW systems, generating frequency-invariant beams requires an impractically large number of antenna elements. To overcome this problem, it is necessary to identify the optimal array configuration that achieves uniform beam performance with a minimal number of elements. For this purpose, empirical formulas were derived by analyzing the rela- tionship among beam characteristics, target frequency range, and required number of antenna elements. These formulas were then applied to a nested array method, which overlays multiple arrays to reduce the total number of elements. When applied to a linear array, the proposed approach reduced the required number of antenna elements by approximately 40%. Furthermore, when the number of available antenna elements is fixed, an optimization study is con- ducted to determine the array geometry that achieves the best possible frequency-invariant beam perfor- mance. The performance variation according to element spacing and array configuration in planar arrays is analyzed, and the optimal array geometry satisfying the target beam performance is derived. Second, to increase the probability of detection, a wideband array antenna with polarization diversity is required. To achieve polarization diversity, antennas capable of receiving both vertically and horizon- tally polarized signals, such as 45◦ slant-polarized or circularly polarized antennas, are preferred. To realize wideband circular polarization, an artificial dielectric layer (ADL) is designed and to implement on an aircraft, it is designed as 1-D linear array. By exploiting different boundary conditions, orthogonal phase delays are introduced along two directions. Moreover, the cascaded slabs are designed with a gradient of effective permittivities to provide a gradual impedance transition from the guided mode to the radiating mode, enabling wideband impedance matching and circular-polarization performance. The antenna shows 3-dB axial ratio in 12-17.5 GHz and impedance bandwidth 10.1-20 GHz. Furthermore, to realize a slant-polarized antenna in a 1-D connected linear array, an extended-ground configuration is employed. For a low-profile wideband array implementation, a two-slab structure is adopted, and a wideband array antenna operating over 6–18 GHz is designed. Third, in direction-finding applications using beam scanning, the relationship between the beamwidth, required number of beams, and angular accuracy is analyzed. To detect high-speed targets with a limited number of beams across a wide bandwidth, a frequency-invariant beam approach is adopted. Simulation results confirmed that applying the frequency-invariant beam significantly improves direction-finding accuracy compared to conventional methods, especially at higher frequencies. Meanwhile, for tracking electromagnetic signals radiated from high-speed targets such as missiles, a monopulse algorithm is required to estimate the direction more rapidly than beam scanning. However, the monopulse algorithm exhibits a frequency-dependent unambiguous range that defines the reliable direction-finding region. This range becomes significantly narrower at higher frequencies. To overcome this limitation, the frequency-invariant beam is applied to the monopulse algorithm. As a result, a wide and uniform unambiguous range was achieved across the entire frequency band. Fourth, A new monopulse architecture based on frequency-invariant beams is proposed. The array antenna is divided into multiple subarrays, and the relative signal comparison between subarrays enables wide-range direction estimation without beam scanning. The proposed system is implemented as an analog circuit using microstrip transmission lines, eliminating the need for additional RF components, thereby reducing cost and achieving high-speed angle estimation through simplified computation. This approach enables direction estimation over a wide angle, wideband, demonstrating significant potential for next-generation wideband electronic warfare and sensing applications. Major: Department of Electrical Engineering

Monolithic Integration of Thin-Film Photodiodes on Silicon CMOS for Multi-spectral 2D and High-speed 3D Image Sensors

2026-03-26T13:13:52Z

Title: Monolithic Integration of Thin-Film Photodiodes on Silicon CMOS for Multi-spectral 2D and High-speed 3D Image Sensors Author(s): Kang, Jubin Abstract: Over the past decades, CMOS Image Sensors (CISs) have evolved significantly, expanding their capabilities from 2D imaging to 3D sensing and their spectral range from the visible (VIS) to the near- infrared (NIR) spectrum. This progression has enabled a diverse range of applications, from consumer electronics to autonomous systems. However, conventional CIS relies on silicon (Si) photodiodes for photodetection. The inherent material properties of silicon, particularly its indirect bandgap, result in a low absorption coefficient and a fundamental spectral limitation, especially in the long-wavelength region. These factors create an urgent need for beyond-silicon thin-film photodiodes (TFPDs) to overcome these limitations. To date, research on TFPDs has primarily focused on the material and discrete device level. The critical next step, the heterogeneous integration of high-performance TFPDs directly onto silicon read-out integrated circuits (ROICs), remains a significant, under-explored challenge. This hybrid integration represents the next frontier for CIS technology. This dissertation first provides a comprehensive overview of this landscape and then presents the design, fabrication, and characterization of two novel beyond-silicon hybrid image sensors: A VIS-NIR dual image sensor based on an organic photodiode and an indirect time-of-flight (iToF) sensor based on a halide perovskite photodiode. The first sensor achieves VIS-NIR dual-mode operation by integrating a solution-processed organic photodiode (OPD), which is transparent to visible light but highly absorbing in the NIR spectrum. This OPD is vertically stacked and isolated within the same pixel as the underlying SiPD, enabling simultaneous and independent capture of VIS data (via SiPD) and NIR data (via OPD). The sensor featuring a 120 × 64 pixel array was fabricated in a 110-nm 1P6M CIS frontside illumination (FSI) process, with the OPD monolithically integrated via low-temperature spin-coating. The device was fully characterized, successfully demonstrating VIS-NIR dual imaging and investigating the influence of the interconnection node pitch on the pixel response additionally. The second sensor, a high-resolution iToF imager, utilizes a fast-response (FA, Pb, I-based) halide perovskite photodiode (PePD). A novel demodulation scheme is introduced, achieving ‘shuttering’ of the PePD by modulating its top electrode (ITO), thereby eliminating the necessity for a conventional transfer gate (TX). The sensor with a 512 × 768 resolution was fabricated in a 130-nm 1P4M FSI process and integrated Pe PD by spin-coating. The sensor with a 5-𝜇𝜇m pitch successfully demonstrated high-quality 2D imaging, exhibited accurate phase detection with non-linearity of <1%, and achieved successful 3D depth imaging. The results presented in this dissertation validate the hybrid TFPD-on-Si-ROIC approach as a powerful and viable pathway for realizing next-generation, high-performance image sensors with functionalities beyond the reach of conventional silicon technology. Major: Department of Electrical Engineering