Repository Collection:https://scholarworks.unist.ac.kr/handle/201301/392026-04-05T17:49:08Z2026-04-05T17:49:08ZActive BSCDN Benchmark Framework with Backside-Compatible CNFET Logic TechnologyShin, YehyunKim, IkkyumPark, MinhoYoon, JunghyunBaek, SeunghunEum, SeongminYang, HeesooChoi, YurimJeong, JaeyongKim, SanghyeonJung, HaksoonKim, SeongjuPark, HeechunKwon, Jiminhttps://scholarworks.unist.ac.kr/handle/201301/911152026-03-27T05:02:40Z2025-12-05T15:00:00ZTitle: Active BSCDN Benchmark Framework with Backside-Compatible CNFET Logic Technology
Author(s): Shin, Yehyun; Kim, Ikkyum; Park, Minho; Yoon, Junghyun; Baek, Seunghun; Eum, Seongmin; Yang, Heesoo; Choi, Yurim; Jeong, Jaeyong; Kim, Sanghyeon; Jung, Haksoon; Kim, Seongju; Park, Heechun; Kwon, Jimin
Abstract: This study presents a benchmark framework for digital blocks featuring an active backside clock distribution network (BSCDN), which incorporates clock buffers and sinks implemented using backside-compatible logic based on carbon nanotube field-effect transistors (CNFETs). The proposed framework includes the fabrication, characterization and TCAD modeling of complementary CNFETs, neural network-based compact modeling, standard cell characterization, and a block-level benchmark comparing the performance of the active BSCDN with that of reported passive CDNs.2025-12-05T15:00:00ZSPIMA: Scalable and Cost-Efficient Sparse Matrix Multiplication via Processing in DRAM ArrayAssylbekov, TairaliYu, MinsangPark, JaewooKim, MingonKim, SeungsuLee, Jongeunhttps://scholarworks.unist.ac.kr/handle/201301/902712026-01-12T09:26:50Z2025-10-25T15:00:00ZTitle: SPIMA: Scalable and Cost-Efficient Sparse Matrix Multiplication via Processing in DRAM Array
Author(s): Assylbekov, Tairali; Yu, Minsang; Park, Jaewoo; Kim, Mingon; Kim, Seungsu; Lee, Jongeun2025-10-25T15:00:00ZIntroduction to UNIST FAB Infrastructure and Open Service for Quantum Integrated Photonic Devices: Equipment and Process TechnologyPark, KibogShin, HeedeukKim, JehyungKwon, Min-SukLee, JongwonChung, Il-Sughttps://scholarworks.unist.ac.kr/handle/201301/899962026-01-07T05:27:03Z2025-02-10T15:00:00ZTitle: Introduction to UNIST FAB Infrastructure and Open Service for Quantum Integrated Photonic Devices: Equipment and Process Technology
Author(s): Park, Kibog; Shin, Heedeuk; Kim, Jehyung; Kwon, Min-Suk; Lee, Jongwon; Chung, Il-Sug
Abstract: As an initiative for constructing a nationwide quantum FAB infrastructure, the UNIST-POSTECH consortium has been awarded a three-year government project in 2023, intended to equip the UNST FAB with the cutting-edge fabrication apparatuses and process technologies for quantum integrated photonic devices. In this talk, an overview of the project will be given including its main objective, fabrication apparatuses to be installed and associated process technologies to be developed, and up-to-date progress reports. Additionally, the detailed time table to kick off providing the open service for utilizing the installed apparatuses and developed processes to the domestic researchers working on quantum technology will also be presented.2025-02-10T15:00:00ZInAs/AlSb Heterostructures for Enhanced Second Harmonic Generation Polaritonic Metasurface within the SWIRKim, MingyunLee, Jongwonhttps://scholarworks.unist.ac.kr/handle/201301/898972026-01-06T10:00:13Z2025-02-11T15:00:00ZTitle: InAs/AlSb Heterostructures for Enhanced Second Harmonic Generation Polaritonic Metasurface within the SWIR
Author(s): Kim, Mingyun; Lee, Jongwon2025-02-11T15:00:00Z