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Browsing by Author : Jo, Su Hyeon

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Band-to-Band Tunneling Analytical Model and Implications in Compact Modeling of Ternary CMOS

Hong, Seung-Woo , Choi, Young-Eun , Kim, Woo-Seok , Jun, Jae Hyeon , Kim, Myung , Jo, Su Hyeon , Kim, Kyung Rok

Conference Paper Issue Date2022-01-25 View87
Design of Novel Ternary Sense Amplifier for Low-Power Ternary SRAM

Kim, Myung , Choi, YoungEun , Kim, Woo-seok , Jun, Jae Hyeon , Hong, Seung Woo , Jo, Su Hyeon , Kim, Kyung Rok

Conference Paper Issue Date2022-01-25 View64
Design of Pass Diode-Based Low-Power Ternary Inverter Circuit

Jun, Jae Hyeon , Choi, Young Eun , Kim, Woo-Seok , Hong, Seung Woo , Jo, Su Hyeon , Kim, Kyung Rok

Conference Paper Issue Date2022-01-25 View58
Ternary SRAM using Tunneling-based T-CMOS for Low Power Application

Choi, Young-Eun , Kim, Woo-Seok , Jun, Jae Hyeon , Hong, Seung Woo , Kim, Myung , Jo, Su Hyeon , Kim, Kyung Rok

Conference Paper Issue Date2022-01-25 View64
TritCell™ Stability Enhancement by Subthreshold Swing Based on T-CMOS Analytical Model

Jo, Su Hyeon , Choi, Young-Eun , Kim, Woo-Seok , Jun, Jae Hyeon , Hong, Seung Woo , Kim, Myung , Kim, Kyung Rok

Conference Paper Issue Date2022-01-25 View81
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