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Showing results 1 to 16 of 16

Issue DateTitleAuthor(s)TypeView
2017-09-09Advanced non-quasi-static(NQS) compact model for characterization of non-resonant plasmonic terahertz detectorAhn, Sang Hyo; Ryu, Min Woo; Jang, Esan; Jeon, Hyeong Ju; Kim, Kyung RokCONFERENCE56
2018-02-05Analysis of Silicon MOSFET-based Plasmonic Terahertz Detection Delay with Advanced Non-Quasi-Static Compact ModelAh, Sang Hyo; Ryu, Min Woo; Jang, Esan; Jeon, Hyeong Ju; Kim, Kyung RokCONFERENCE37
2017-05-22CMOS-Compatible Ternary Device Platform for Physical Synthesis of Multi-valued Logic CircuitsShin, Sunhae; Jang, Esan; Jeong, Jae Won; Kim, Kyung RokCONFERENCE47
2018-02-05Common Body for Ternary CMOS Logic Gates for Endurance of the Input Pattern Effects on Intermediate State LevelJang, Esan; Shin, Sunhae; Jeong, Jae Won; Kim, Kyung RokCONFERENCE41
2015-08Compact Design of Low Power Standard Ternary Inverter Based on OFF-State Current Mechanism Using Nano-CMOS TechnologyShin, Sunhae; Jang, Esan; Jeong, Jae Won; Park, Byung-Gook; Kim, Kyung RokARTICLE848
2017-02-15Compact Model for Positive Gain-Embedded Voltage Transfer Curve of Inverter Based on Novel I-V Curves for Multi-Peak NDRJeong, Jaewon; Shin, Sunhae; Jang, Esan; Kim, Kyung RokCONFERENCE27
2017-02-14Demonstration of CMOS with Gate-Bias Independent Junction Band-to-Band Tunneling Current for Standard Ternary InverterSunhae Shin; Jang, Esan; Jeong, Jae Won; Kim, Kyung RokCONFERENCE29
2016-06-12Demonstration of standrad ternary inverter based on CMOS technologyShin, Sunhae; Jang, Esan; Jeong, Jae Won; Kim, Kyung RokCONFERENCE57
2018-02-05Design of THz Aperture based on Near-Field Microscopy Technology for High Resolution THz ImagingJeon, Hyeong Ju; Ryu, Min Woo; Jang, Esan; Ahn, Sang Hyo; Kim, Kyung RokCONFERENCE28
2016-06-12Device optimization on gate oxide and spacer dielectric permittivity for 'well-tempered' nanoscale MOSFETJang, Esan; Shin, Sunhae; Jung, Jae Won; Jung, Yu Jung; Kim, Kyung RokCONFERENCE31
2015-06Gate induced drain leakage reduction with analysis of gate fringing field effect on high-kappa/metal gate CMOS technologyJang, Esan; Shin, Sunhae; Jung, Jae Won; Kim, Kyung RokARTICLE729
2018-06Low Leakage III-V/Ge CMOS FinFET Design for High-Performance Logic Applications with High-kappa Spacer TechnologyJang, Esan; Shin, Sunhae; Jeong, Jae Won; Kim, Kyung RokARTICLE341
2015-07-02Multi-Valued Logic Based on CMOS technologyKim, Kyung Rok; Shin, Sunhae; Jang, Esan; Jung, Jae WonCONFERENCE33
2014-06-08Standard Ternary Inverter Based on Junction Leakage-Enhanced Nanoscale Planar CMOS and Its Variation ImmunityKim, Kyung Rok; Shin, Sunhae; Jang, EsanCONFERENCE32
2016-02-23Tunnel FET-based negative differential resistance device with triple-peaks and ultra-high peak-to-valley current ratioJae Won Jeong; Shin, Sunhae; Jang, Esan; Kim, Kyung RokCONFERENCE29
2017-07-26Ultra-Low Standby Power and Static Noise-Immune Standard Ternary Inverter Based on Nanoscale Ternary CMOS TechnologyShin, Sunhae; Jeong, Jae Won; Jang, Esan; Kim, Kyung RokCONFERENCE112
Showing results 1 to 16 of 16

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