Tunable Current Transport in PdSe2 via Layer‐by‐Layer Thickness Modulation by Mild Plasma

The thickness‐modulated phase transition from semi‐metallic (bulk) to semiconductor (a few layers) is the most unique property of pentagonal palladium diselenide (PdSe2). Thus, precise thickness tailoring is essential to fully utilize its unique thickness‐dependent property for exotic device applications. Here, tunable current transport in PdSe2 based field‐effect transistors (FETs) enabled by layer‐by‐layer thinning of PdSe2 using mild SF6:N2 plasma is presented. With this top‐down plasma‐etching method, the PdSe2 layer thickness can be precisely modulated without structural degradation, which paves the way to realize the complete potential of PdSe2‐based devices. By modifying the plasma power and exposure time, an atomic layer precision etching rate of 0.4 nm min−1 can be achieved. Atomic‐force microscopy, Raman spectroscopy, and secondary ion mass spectrometry confirm the uniform and complete removal of top layers of PdSe2 flake over a large area without affecting remaining bottom layers. Electrical characterization of current transport in plasma‐thinned PdSe2 FETs reveals excellent layer‐dependent conductivity similar to pristine PdSe2 FETs. This simple but highly scalable and controllable plasma‐etching technique provides a promising way to fabricate PdSe2 devices based on lateral heterostructures composed of different thicknesses PdSe2 flakes to exploit strongly thickness‐dependent electronic structures.


Tunable Current Transport in PdSe 2 via Layer-by-Layer Thickness Modulation by Mild Plasma
Tanmoy Das, Dongwook Seo, Jae Eun Seo, and Jiwon Chang* DOI: 10.1002/aelm.202000008 number of valence electrons in Pd strongly hybridizes Pd and Se atoms, causing strong interlayer coupling which results in this significant dependency of band gap on the layer number of PdSe 2 . Oyedele et al., [5] observed distinct layer-dependent transport properties where they found that electron on/off ratio decreases from ≈10 6 to <10 for bilayer to bulk PdSe 2 . Recently, Zeng et al, [6] has grown layered PdSe 2 with a tunable thickness from 1.2 to 20 nm by selenizing pre-deposited Pd layer. However, precise thickness-controlled growth of PdSe 2 by the bottom-up growth technique is still challenging, especially for a low layer number. On the other hand, mechanical exfoliation of PdSe 2 usually produces non-uniform domains of flakes containing different numbers of layers in tiny size without any controllability and re-productivity. [5,7] Instead of controlling the PdSe 2 layer number by growth, it can also be modified by removing the layers after synthesis. Therefore, a redefined top-down approach using an etching technique would be the most effective in tuning the thickness of PdSe 2 , which can be exploited for selectively (or completely) thinning down PdSe 2 to the desired thickness.
Meanwhile, several post-synthesis etching techniques by different approaches including thermal annealing, [8,9] laser [10] and focused ion beam (FIB), [11,12] and plasma etching [13][14][15] have been extensively studied to achieve ultra-thin TMDs materials. Among these, plasma etching is most commonly used in industry because of its compatibility with conventional complementary metal-oxide-semiconductor processing. However, during the etching process, unwanted damage by direct bombardment of high energy ions is inevitable. Additionally, strain generation due to the thermal heating can cause physical damage to the remaining layers as a consequence electrical performance of thinned layer becomes greatly degraded, which need to be overcome. Furthermore, presently reported recipes on the plasma thinning have been mainly focused on MoS 2 [16] and WSe 2 . [17] Any complete studies with highly selective and controllable etching method for PdSe 2 which exhibits a wider range of band gap modulation by the thickness are still unavailable. Previous reported studies involving PdSe 2 and its application to thickness dependent conduction behavior have focused on the synthesis by bottom-up technique (e.g., chemical vapor deposition) and the evaluation of its performance.
The thickness-modulated phase transition from semi-metallic (bulk) to semiconductor (a few layers) is the most unique property of pentagonal palladium diselenide (PdSe 2 ). Thus, precise thickness tailoring is essential to fully utilize its unique thickness-dependent property for exotic device applications. Here, tunable current transport in PdSe 2 based field-effect transistors (FETs) enabled by layer-by-layer thinning of PdSe 2 using mild SF 6 :N 2 plasma is presented. With this top-down plasma-etching method, the PdSe 2 layer thickness can be precisely modulated without structural degradation, which paves the way to realize the complete potential of PdSe 2 -based devices. By modifying the plasma power and exposure time, an atomic layer precision etching rate of 0.4 nm min −1 can be achieved. Atomic-force microscopy, Raman spectroscopy, and secondary ion mass spectrometry confirm the uniform and complete removal of top layers of PdSe 2 flake over a large area without affecting remaining bottom layers. Electrical characterization of current transport in plasma-thinned PdSe 2 FETs reveals excellent layerdependent conductivity similar to pristine PdSe 2 FETs. This simple but highly scalable and controllable plasma-etching technique provides a promising way to fabricate PdSe 2 devices based on lateral heterostructures composed of different thicknesses PdSe 2 flakes to exploit strongly thickness-dependent electronic structures.

Introduction
2D material palladium diselenide (PdSe 2 ), a puckered pentagonal group-10 transition metal dichalcogenides (TMDs) with low symmetry lattice structure, has emerged as a promising candidate for the future device applications due to its large tunable band gap, strong interlayer coupling, and outstanding environmental stability. [1][2][3][4][5] Especially, the large band gap modulation [6] ranging from 0 eV (semi-metallic) in bulk to 1.3 eV (semiconducting) in monolayer makes PdSe 2 more unique since the electrical conductivity of PdSe 2 flake can be abruptly tuned by modulating its thickness. The presence of excess www.advelectronicmat.de However, controlling thickness by top-down technique or a selective etching method have not been reported yet, although it is essential for device fabrication process.
Here, we propose a selective, uniform, and large-area etching of PdSe 2 and its direct demonstration on tunable current transport in PdSe 2 based field-effect transistors (FETs) by controlling the layer thickness of PdSe 2 with atomic layer precision using mild SF 6 +N 2 plasma. A monolayer etching rate of 0.4 nm min −1 for PdSe 2 was achieved with a mild plasma power density of 1.5 mW cm −3 at room temperature. Optical microscopy and atomic force microscopy (AFM) measurements were performed to check the thickness change and surface morphology before and after etching. The effect of plasma etching on the surface modification was examined by Raman spectroscopy and secondary ion mass spectrometry (SIMS) imaging. Furthermore, to investigate the transport property of plasma-thinned PdSe 2 flakes, an extensive study was carried out in comparison with pristine PdSe 2 flake through the electrical characterization of pristine and plasma-thinned PdSe 2 FETs. This highly selective and reproducible plasma etching technique can be applied to demonstrate PdSe 2 heterostructures with different thicknesses and sizes; thereby fully utilizing the great potential of PdSe 2 for future device applications.

Results and Discussion
To determine the selective, controlled, and atomic-scale etching method of PdSe 2 , first we mechanically exfoliated 2D PdSe 2 flakes from bulk crystals by modified scotch tape method [18,19] and transferred onto thermally grown 300 nm SiO 2 on highly p-doped Si substrates. Since the optical contrast of 2D material varies with the change of its thickness, [20] visual characterization based on the optical contrast on the substrate is an efficient way to roughly identify the thickness of PdSe 2 flake. Optical microscopy image was obtained after exfoliation for primary identification of the different layer number of exfoliated flakes. Afterward, a dry chemical etching was carried out to thin down the PdSe 2 flakes using SF 6 (2 sccm)/N 2 (6 sccm) as a gaseous reactor under low power radio frequency (RF) plasma at room temperature. Process pressure was maintained at 20 mTorr throughout unless specified otherwise. By utilizing oxidationreduction reaction produced by SF 6 +N 2 precursor under a low density plasma RF power, strong oxidant reacts with Pd and Se simultaneously leading to the effective reduction of PdSe 2 thickness. Through this reaction, fluorine radicals form gaseous by-products which are removed from the chamber after etching without leaving any residues. Mild plasma etching strongly depends on SF 6 +N 2 gaseous precursor associated with the low power plasma source. Therefore, by varying input plasma power density, etching rate can be precisely regulated. Plasma chemistry for PdSe 2 etching applied in this work is similar to the reported soft etching technique for MoS 2 [16] and MoSe 2 . [21] Selective etching of PdSe 2 could be achieved without having a negligible etching effect on SiO 2 by controlling the plasma power density for different plasma irradiation time. Initially a wide spectrum of plasma etching condition was thoroughly investigated by changing the plasma power density. Then the critical value was determined to minimize the etching of SiO 2 so that plasma etching could be selective for PdSe 2 only. An optimized plasma etching condition is highly desirable for achieving uniform and controlled etching over a large area of sample without any structural degradation in the etched material. Figure 1a,b compares the optical image of multilayer PdSe 2 flake before and after plasma etching for 2 min under 1.5 mW cm −3 plasma power density. From the optical contrast, a significant amount of change in different domains of flake was observed, indicating the decrease in the thickness of PdSe 2 flake. To precisely estimate the thickness change of PdSe 2 flake, the thicknesses of before and after the plasma treatment were measured through AFM as shown in Figure 1c,d. AFM line profiles in the bottom panel shows estimated heights of ≈3.5 and ≈2.7 nm before and after plasma etching, respectively, measured at dashed lines in Figure 1c,d. By comparing the AFM profile, we found that after 2 min of plasma treatment, about 0.8 nm of PdSe 2 thickness was reduced. Therefore, an atomicscale etching rate of ≈0.4 nm min −1 which is equivalent to monolayer PdSe 2 was achieved at an input plasma power density of 1.5 mW cm −3 . Additionally, a SiO 2 substrate was also etched using PR mask under the same etching condition to identify the etching effect on SiO 2 substrate. A remarkably minimal etching depth of ≈1.5 nm after 30 min of plasma etching using 1.5 mW cm −3 plasma power density was found ( Figure S1, Supporting Information). To precisely calculate the etching rate or etched layer number of PdSe 2 , SiO 2 etched depth was deducted from the AFM results. Furthermore, another faster etching condition was obtained by increasing the input plasma density. By doubling the plasma power density to 3 mW cm −3 , ≈25 layers (≈10 nm) of PdSe 2 was removed in 10 min of plasma irradiation. Figure 1e summarizes the etching depth as a function of etching time for different plasma power densities. As shown by vertical dotted line, initial etching rate was slow due to the absence of sufficient amount of oxidant. Afterward, a stable and linearly increasing etching rate was maintained with increasing plasma irradiation time. A linear dependence of etching rate was observed for different plasma powers with different slopes of the curves. Etching rates of ≈0.4 and ≈1 nm min −1 , defined as slow and fast etching modes, were extracted for the power densities of 1.5 and 3 mW cm −3 , respectively. Figure 1f shows the variation of the root-mean-square (RMS) roughness of the surface after etching process with respect to time. RMS roughness values were estimated from AFM image after each etching step. Surface roughness significantly increased within the initial 10 min of etching and became somewhat stable afterward. The roughness values were able to be kept below 0.35 nm during etching up to 30 min. This result validates that the surface roughness of plasma-thinned PdSe 2 flakes was comparable to an average roughness value of pristine PdSe 2 flakes. Since etching rate and surface roughness rise with increasing plasma density, further increase in plasma power could result in a higher surface roughness by generating more defect sites. It is obvious that producing larger amount of oxidant by increasing pressure or supplying higher amount of precursor can fasten the etching rate, but in consequence it may significantly increase the roughness and damage the crystal surface. Achieving an atomic level etching rate maintaining a smooth and damagefree crystal structure is the principal objective of this study. The mild etching mode below the critical value (≈3 mW cm −3 ) of the www.advelectronicmat.de input power density was found to be optimal for thinning down any pre-determined number of PdSe 2 layer. Therefore, this condition was maintained throughout this work.
To demonstrate uniform layer-by-layer thinning of PdSe 2 over a large area irrespective of the initial thickness, plasma etching was performed on a large (≈80 µm long) and over 60 layers (≈23.8 nm) pristine PdSe 2 flake ( Figure S2a, Supporting Information). Figure S2a-c, Supporting Information, shows systematic thinning down of thick 60 layers PdSe 2 into ≈4 layers. As discussed earlier, PdSe 2 etching condition can be efficiently controlled by varying plasma power for different purpose; for example, faster etching using increased plasma power is efficient to thin down thick PdSe 2 flakes rapidly, whereas slow etching is useful for fine tuning to obtain ultra-thin thickness. At first, we adopted faster etching rate using increased plasma power which significantly accelerate the etching rate due to the increased ion density and electron temperature of the plasma. As a result, 37 layers (≈14.8 nm) were uniformly thinned down from all over the PdSe 2 flakes after 15 min of etching ( Figure S2b, Supporting Information). After that, the PdSe 2 flake was further thinned down by combining fast and slow etching modes for 5 min, to achieve ≈1.7 nm thick PdSe 2 flake ( Figure S2c, Supporting Information). The AFM profiles extracted from the corresponding AFM images for different etching times at 0, 15, and 25 min, respectively, are shown in bottom panel of Figure S2d-f, Supporting Information. It is also noticeable that original domain size and shape of the pristine PdSe 2 flakes remain unaffected after the long plasma process which is common for the conventional thermal or laser-based etching process.
Raman spectroscopy is a sensitive technique and widely used to study layer numbers, defects, strain, and substrate effects of 2D materials. [22,23] A systematic Raman characterization was carried out to study the effect of plasma on the crystal property of PdSe 2 and to estimate the decrease of the PdSe 2 layer number along with the various exposure times to plasma treatment. Raman measurement was performed using a confocal Raman microscopy with the laser excitation line of 532 nm. The incident laser power was maintained at 0.5 mW to avoid any additional damage on the etched surface. All the Raman single spectra were calibrated with the Si substrate peak at 520 cm −1 . Optical images of PdSe 2 flakes after different etching times within the range of 0-25 min during Raman study is presented in Figure S3a, Supporting Information. Figure 2a shows the Raman spectra of pristine and plasmathinned PdSe 2 flakes with varying plasma irradiation time. In Figure 2a, there are four apparent peaks located at ≈144.5, www.advelectronicmat.de ≈208, ≈223, and ≈255.5 cm −1 corresponding to A g 1 -B 1g 1 , A g 2 , B 1g 1 , and A g 3 Raman mode, respectively. [7] The first three intrinsic peaks of PdSe 2 are appeared due to the movement of Se atoms, whereas higher A g 3 peak is dominant by the relative movement between Pd and Se atoms. [5] Raman spectra was systematically investigated after each fixed interval of plasma treatment at the same location of the etched PdSe 2 flake. All five Raman peaks described above monotonously shifted toward higher frequency after each plasma treatment due to the thickness reduction of pristine bulk by etching. This trend of frequency shift with the increasing plasma irradiation time is consistent with the thickness-dependent Raman spectra in the pristine PdSe 2 flake. [4,5,7] Although peak intensity and position continuously changes with gradual increase of plasma irradiation time, a clear and strong Raman signal was observed in every etching step which indicates that crystal property of PdSe 2 was maintained even after a long plasma etching of 25 min. In addition, as the thickness of PdSe 2 changes with increasing plasma irradiation, some new Raman peak at lower wavenumber around ≈120-130 cm −1 was observed in a few layer PdSe 2 which are believed to be due to the orthorhombic space group change from Pbca to the Pca21 for few layer PdSe 2 (details in Figure  S3b, Supporting Information). Figure 2b shows Raman frequency shift for the A g 1 -B 1g 1 and A g 3 Raman modes after different plasma etching time. A significant Raman shift of around 4-5 cm −1 was observed for pristine to 25 min plasma-etched PdSe 2 . The magnified line spectra from 240 to 280 cm −1 is plotted in Figure S3c, Supporting Information. This degree of peak shift is well agreed with previously reported value [5,7] and implies that the thickness of PdSe 2 can be precisely tuned with varying the plasma etching time. Raman intensity ratio of A g 3 to Si increased as thickness decreased as a function of etching time as plotted in Figure 2c. Although peak position changes with the continues reduction in thickness after plasma treatment, Raman intensity of A g 3 Raman mode decreased as the Raman signal from the substrate Si peak at ≈520.5 cm −1 becomes dominant with longer etching time, indicating the thinning of PdSe 2 flakes (the detail in Figure S3d, Supporting Information).
The surface elemental properties of crystals can be influenced by plasma treatment; therefore, further investigation is necessary to elucidate the surface chemistry and surface chemical composition after plasma treatment. Due to the inefficiency to focus on a small particular region by the X-ray beam in X-ray photoelectron spectroscopy (XPS), it is difficult to observe the significant chemical composition when the flake size relatively small. Therefore, XPS has not been used in this study. Recently, time-of-flight SIMS (ToF-SIMS) has emerged as a powerful technique to characterize atomically thin 2D materials, due to its ultra-high chemical selectivity. [24][25][26] ToF-SIMS spectroscopy provides a direct qualitative analysis of the elemental composition with a unique advantage of obtaining high resolution image of the entire surface. [27,28] In order to investigate the elemental surface composition of PdSe 2 , before and after plasma treatment, ToF-SIMS chemical mapping measurement was carried out with a sub-micron lateral resolution and SEMlevel visualization capability. Figure 3a,b presents a 50 × 50 µm area lateral resolution ToF-SIMS image specifying i) Pd, ii) Se, and iii) Si secondary ions by positive and negative probe scan as representative of PdSe 2 and SiO 2 surfaces. These images were acquired at the same position before and after 10 min plasma treatment corresponding to the optical image of PdSe 2 crystal in Figure S4, Supporting Information. ToF-SIMS surface map of Pd + , Se − secondary ions represents isolated PdSe 2 domain distribution on SiO 2 substrate before and after plasma treatment. Elemental chemical maps reveal that the homogeneous incorporation of Pd and Se atoms were well-preserved in the thinned PdSe 2 layer even after 10 min plasma treatment. The uniform chemical distribution with a clear sharp boundary between the PdSe 2 crystal and SiO 2 substrate rules out any nonhomogeneous composition conversion after plasma treatment which is consistent with our Raman measurements in Figure 2.
To investigate the transport properties in the plasma-thinned PdSe 2 flake, back-gated FETs were fabricated and characterized.

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The details in device fabrication steps can be found in the Experimental Section. For complete understanding the effect of plasma treatment on PdSe 2 , we fabricated two FETs from pristine PdSe 2 and plasma-thinned PdSe 2 flakes with a similar thickness and compared their transport characteristics. Since previous studies have reported that ≈20 layers (≈8-≈9 nm) PdSe 2 FETs exhibits the highest mobility [5,7] similar to the other back-gated 2D materials FETs, [29][30][31] a thickness of ≈9 nm was selected for the preliminary device fabrication. Figure 4a,b shows the schematic and photograph of PdSe 2 FETs along with the optical microscope and AFM images of pristine and plasmathinned flakes. To obtain plasma-etched PdSe 2 flake, an ≈13.2 nm as-exfoliated flake was etched for 10 min under 1.5 mW cm −3 plasma power density. The remaining thickness of ≈ 9 nm was achieved as shown in Figure 4b. The transfer (I ds -V gs ) characteristics of ≈9 nm thick pristine and plasmathinned PdSe 2 FETs at a fixed low drain bias (V ds ) of 0.1 V are compared in Figure 4c. From the transfer characteristics, we observed almost symmetric, but electron dominant, ambipolar behaviors with the on/off ratio greater than 10 2 for both pristine and plasm-thinned PdSe 2 FETs. Slightly higher current was found for pristine PdSe 2 FETs than plasma-thinned PdSe 2 FETs. We extracted the threshold voltage (V th ) for both devices by extrapolating the straight line from the linear transfer characteristics as shown in Figure S5a, Supporting Information. The estimated V th were −8 and +6 V for pristine and plasmathinned PdSe 2 FETs, respectively. A positive shift in the V th suggests that the native n-type doping in PdSe 2 was removed by SF 6 +N 2 plasma treatment while managing the drive current within the same order. Figure 4d displays the output (I ds -V ds ) characteristics (V gs sweep range from 0 to 60 V in 10 V step) of both devices. We observed a linearly increasing current at a low drain bias (also see Figure S5b, Supporting Information), indicating the low Schottky barrier at source/drain contacts. [32] Almost similar transport behavior in plasma-thinned PdSe 2 with similar thickness pristine PdSe 2 reveals that crystal structure of PdSe 2 was not altered by the plasma treatment, which was also confirmed in our structural and optical studies. It has been demonstrated that PdSe 2 has strong thickness-dependent electrical conductivity due to its largely tunable bandgap depending on the layer number. [5] To further explore the thickness dependency on current transport of the plasma-thinned PdSe 2 , flakes with various thicknesses ranging from ≈3 to ≈25 nm were obtained by etching using our previously described plasma treatment recipe. In particular, a uniform etching time of 10 min was employed under a plasma power density of 1.  www.advelectronicmat.de exfoliation for comparison. We fabricated a multiple number of devices for each thickness of both pristine and plasma-thinned PdSe 2 . Some of the representative transfer characteristics of PdSe 2 FETs for different thicknesses (≈3-≈25 nm) were presented in Figure S6a,b Supporting Information, for pristine devices and plasma-etched devices, respectively. Figure 4e summarizes on-current (I on ) and off-current (I off ) as a function of flake thickness for both pristine and plasma-thinned PdSe 2 . As the flake becomes thicker, I off monotonically increases due to the reduction of band gap as confirmed by other studies. [5] On the other hand, I on also increases for thicker PdSe 2 flake and trends to saturate after a certain level due to the large interlayer resistance in thicker PdSe 2 . [33] The thickness-dependent on/off ratios for the electron and hole current were summarized and displayed in Figure S7, Supporting Information. For both pristine and plasma-thinned PdSe 2 FETs, an increase in the on/off ratio from ≈10 to ≈10 4 was observed as the thickness is reduced from ≈25 to ≈3 nm. Meanwhile, a smaller on/off ratios can be found for the hole current. A trend of increasing the on/off ratio for the thinner PdSe 2 flakes is associated with the semimetallic to semiconducting transition in PdSe 2 as reported in the previous studies. [5,7] A slight deviation in I on and I off in the plasma-etched PdSe 2 compared to the pristine PdSe 2 is observed. However, all plasma-thinned PdSe 2 devices followed the similar trend as in pristine PdSe 2 devices with comparable current at a similar thickness range, suggesting that plasma thinning is an effective method for tuning the PdSe 2 thickness without altering the thickness-dependent transport properties  I V V at low V ds = 0.1 V, where L, W, and C ox represent the channel length, width, and effective oxide capacitance per area, respectively. C ox was estimated to be 1.15 × 10 −8 F•cm −2 , considering C ox = ε 0 ε r /d ox , where ε 0 = 8.85 × 10 −14 F•cm −1 , ε r = 3.9 are the relative permittivity of air and SiO 2 , respectively, and d ox = 300 nm is the SiO 2 thickness for our device. To examine the mobility variation with the PdSe 2 thickness, electron and hole mobilities were plotted as a function of thickness for pristine and plasma-thinned PdSe 2 FETs as in Figure 4f. The calculated electron mobility appeared strongly dependent on the flake thickness in a nonmonotonic fashion while the hole mobility was substantially lower and less dependent on the thickness. The apparent electron mobility initially increases gradually from ≈40 cm 2 V −1 •s −1 for the thickness of ≈3 nm and reaches the peak value of ≈88 cm 2 V −1 •s −1 for ≈9 nm thick flake, and then decreases down to ≈27 cm 2 V −1 •s −1 for the further increase of a thickness to ≈25 nm. For the flake thickness thinner than 9 nm, the lower mobility is observed due to the insufficient charge screening. [34] As the layer number increases, mobility is generally enhanced due to the reduced Coulomb scattering from charge impurity. Simultaneously, additional interlayer resistance also starts to increase as the layer number increases in the thicker PdSe 2 channel of a backgated FET configuration. [35,36] Therefore, as the flake thickness is further increased over ≈9 nm, the mobility degradation by the interlayer resistance becomes dominant over the mobility gain from the charge screening, thus reversing the trend. [37,38] This nonmonotonic trend suggests that a layer number in the range of ≈5 and ≈20 layers would be ideal for maximizing the device performance. Therefore, the precise thickness control achieved by our plasma treatment strategy may pave the realistic way for harvesting the maximum potential of PdSe 2 . These results show that all plasma-thinned PdSe 2 devices followed the same trend as in pristine PdSe 2 devices. Although, the dependency of on/off current ratio and mobility on the thickness of pristine and plasma-thinned PdSe 2 flakes look alike, there is a minimal degradation in the etched PdSe 2 flakes. This minimal but observed degradation in the plasma-etched PdSe 2 suggests the impact of surface damages induced by SF 6 plasma. The plasma process introduces an increased amount of surface roughness compared with pristine PdSe 2 . As a result, plasmaetched devices are more susceptible to the carrier scattering which lowers the current. Additionally, interfacial impurities such as surface chemical residue of etched surface also can be responsible for the mobility degradation in plasma-etched PdSe 2 . Moreover, the dependency of mobility on the thickness of pristine and plasma-thinned PdSe 2 flakes look alike with a minimal degradation in the etched PdSe 2 flakes, confirming the effectiveness of our plasma etching approach.
To further investigate the plasma etching effect on the device property, a pristine PdSe 2 FETs with relatively thicker flake (≈20 nm) was fabricated and systematically etched as illustrated in Figure 5a. Evolution of transfer and output characteristics of PdSe 2 FETs along with the sequential plasma treatment with 1.5 mW cm −3 plasma power is shown in Figure 5b,c. The transfer curves in Figure 5b confirms a progressive transition from semi-metallic to semiconducting nature of PdSe 2 with an increased etching time and etched depth. As the etching depth increases (in other word, remaining channel thickness decreases) after every etching step, I off is lowered monotonically due to the channel thickness reduction and the resulting band gap increase. Therefore, the on/off ratio increases. It is also noted that I on decreases after each etching step which is due to the increased channel resistance of the PdSe 2 channel as it becomes thinner and hence the band gap increases. This sequential evolution of semimetallic to semiconducting carrier transport in the PdSe 2 FET is consistent with the thickness-dependent phase transition from semi-metal to semiconductor in the electronic property of PdSe 2 . However, it is observed that there is a slight change in V BG for the current minima, which may be due to the unintentional change in the surface morphology during the etching process. As shown in Figure 5d, total etching time of 29 min is collectively employed to achieve the final remaining thickness of ≈8 nm. During prolonged etching time, plasmathinned PdSe 2 is likely to experience more ionized impurities. The chemical impurities or residues also may remain on the surface of PdSe 2 channel which causes the irregular shift in the off current minima in etched device. Figure 5d represents the relationship between the remaining channel thickness and the on/off ratio with respect to the sequentially applied etching steps. As the remaining channel thickness decreased after each etching step, the on/off ratio for electrons increases gradually from <10 for pristine ≈20.1 nm thick PdSe 2 to >10 2 for ≈8 nm thick PdSe 2 after total 29 min of etching. A positive V th shifts with the increasing etching time was observed as shown in the Figure 5e. The V th of pristine device moved in the positive direction from −30 to +18 V upon etching for 29 min. This positive V th shift is an undesirable side effect which can be associated with p-doping induced by fluorine adatoms during the SF 6 plasma. [39,40] Electron mobility in Figure 5f follows monotonically rising and falling trend as a function of etching time as similar as in Figure 4f. As the etching time increased, the remaining channel thickness was further reduced, and a gradual mobility improvement was observed until etching time up to 15 min. As discussed with Figure 4f, when the channel thickness was thinned down below ≈9 nm, mobility was expected to follow the downfall. A direct comparison of electron mobility trend between plasma etching PdSe 2 and plasma-etched FETs device is also presented in Figure S8, Supporting Information. Unlike plasma-etched PdSe 2 sample, the mobility of the pristine PdSe 2 device started to decrease earlier after ≈20 min of etching at an estimated remaining layer thickness over ≈12 nm, which may be due to the increased surface roughness induced by the longer etching time or the influence of SF 6 plasma on the exposed channel layer. In case of plasma-etched PdSe 2 the maximum point of mobility was achieved at thickness of ≈9 nm. The mobility degradation suggests that the reduced PdSe 2 channel at this point of etching are susceptible for the insufficient charge screening from Coulomb scattering. Our demonstration of thinning down only the channel region in PdSe 2 FETs may be useful to fabricate the recessed channel PdSe 2 FETs to take advantage of the unique thickness-dependent semi-metallic to semiconducting transition property of PdSe 2 to lower the contact resistance, which will be in the scope of future studies.

Conclusion
In summary, we have demonstrated a highly controllable, selective, and uniform atomic layer etching of PdSe 2 using SF 6 +N 2 plasma irradiation. By controlling the plasma power density, similar number of PdSe 2 layers can be etched uniformly over a large area. The surface roughness of plasma-thinned PdSe 2 remained homogeneous with RMS roughness less than 0.35 nm at an elongated etching time over 30 min, without any shrinkage in the pristine domain shape or sizes. This highly selective etching of PdSe 2 strongly depends on plasma power density and exposure time. Thus, by tuning the slow and fast etching modes, any pre-determined number of PdSe 2 layer can be achieved irrespective of their original thickness. AFM, Raman, and ToF-SIMS imaging reveal that only top several layers of PdSe 2 were removed while bottom PdSe 2 remained unaffected. The fabricated FETs based on plasma-thinned PdSe 2 shows similar thickness-dependent transport characteristics with pristine PdSe 2 FETs. Therefore, our plasma-assisted layer control of PdSe 2 could be useful for the fabrication of PdSe 2 -based devices utilizing its unique thickness-dependent transport property. Lastly, by controlling the etching depth of PdSe 2 channel, ideal optimal thickness range for transistorbased operation can be achieved, where a compromise between a high on/off ration and mobility is required. These results suggest that our simple but highly efficient way of thickness control of PdSe 2 enhances the possibility to realize novel device ideas based on the distinct thickness-dependent semi-metallic to semiconducting transition in PdSe 2 .

Experimental Section
PdSe 2 Preparation and Plasma Thinning: PdSe 2 flakes were obtained by mechanical exfoliation from bulk crystals (supplied by 2D semiconductors) onto a degenerately doped Si substrate with thermally grown 300 nm of SiO 2 with prepared alignment markers. A modified mechanical exfoliation technique was followed using a viscoelastic stamp (Gelfilm from Gelpak) as an intermediate substrate for exfoliation

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Adv. Electron. Mater. 2020, 6,2000008 to avoid additional polymer residue. Furthermore, the samples were cleaned in acetone and rinsed with isopropyl alcohol and deionized water to remove tape residues. SF 6 plasma were excited (commercial 13.56 MHz RF source) with the N 2 career gas at a pressure of 20 mTorr with flow rates of 2 and 6 sccm, respectively, at room temperature. Soft plasma was maintained to reduce the destructive ion bombardment onto the samples by controlling the input plasma power density. Plasma etching rate was optimized with the different power density values of 1.5 and 3 mW cm −3 to determine different etching conditions.
Microscopic, Optical, and Electrical Characterizations: Optical microscopy, Raman, and AFM were used to identify the thicknesses of selected flakes. Suitable flakes were identified and imaged using a Nikon LV100ND optical microscope. The thicknesses of selected flakes were confirmed by tapping mode AFM topography imaging (Veco DI-3100 system). Raman analysis of different PdSe 2 flakes was conducted on a WITec alpha 300R Raman system with the excitation source of 532 nm at room temperature. The laser power was kept fixed at 0.5 mW to avoid laser-induced heating. The electrical characterizations were conducted at room temperature using a semiconductor analyzer (Agilent, B1500A) in a shielded probe station under ambient condition.
ToF-SIMS Analysis: High spatial resolution surface chemical mappings were carried out with a ToF-SIMS (ION-TOF 5, Germany) instrument, equipped with a bismuth liquid-metal ion source. Surface chemical mapping was performed over a specified area by a 50 keV Bi 3++ cluster beam with a pixel resolution of 512 × 512.
Device Fabrication: To fabricate bottom gated PdSe 2 FETs, source-drain metal electrodes (5 nm Ti/50 nm Au) were patterned using an electronbeam lithography process followed by electron-beam evaporation. Finally, the samples were immersed in acetone to lift-off followed by cleansing with isopropyl alcohol and deionized water.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.