BROWSE

사진

  • ResearcherID
  • Scopus
  • Google Citations

Lee, Jongeun (이종은)

Department
School of Electrical and Computer Engineering(전기전자컴퓨터공학부)
Research Interests
Reconfigurable processor architecture, neuromorphic processor, stochastic computing
Lab
Renew: Reconfigurable and Neuromorphic Computing Lab
E-Mail
jlee@unist.ac.kr
Website
http://ecl.unist.ac.kr/
This table browses all dspace content
Issue DateTitleAuthor(s)TypeViewAltmetrics
201712Efficient Execution of Stream Graphs on Coarse-Grained Reconfigurable ArchitecturesOh, Sangyun; Lee, Hongsik; Lee, JongeunARTICLE64 Efficient Execution of Stream Graphs on Coarse-Grained Reconfigurable Architectures
201608Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration SpacesSim, Hyeonuk; Rahman, Atul; Lee, JongeunARTICLE94 Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration Spaces
201607Mapping imperfect loops to coarse-grained reconfigurable architecturesSim, Hyeonuk; Lee, Hongsik; Seo, Seongseok, et alARTICLE334 Mapping imperfect loops to coarse-grained reconfigurable architectures
201512Scalable application mapping for SIMD reconfigurable architectureKim, Yongjoo; Lee, Jongeun; Lee, Jinyong, et alARTICLE238 Scalable application mapping for SIMD reconfigurable architecture
201405Improving performance of loops on DIAM-based VLIW architecturesLee, Jinyong; Lee, Jongwon; Paek, Yunheung, et alARTICLE318 Improving performance of loops on DIAM-based VLIW architectures
201403Configurable range memory for effective data reuse on programmable acceleratorsLee, Jongeun; Seo, Seongseok; Paek, Jongkyung, et alARTICLE328 Configurable range memory for effective data reuse on programmable accelerators
201402Design and optimization for embedded and real-time computing systems and applicationsLee, Jongeun; Goddard, Steve; Kuo, Chin-FuARTICLE324 Design and optimization for embedded and real-time computing systems and applications
201312Evaluator-executor transformation for efficient pipelining of loops with conditionalsJeong, Yeonghun; Seo, Seongseok; Lee, JongeunARTICLE312 Evaluator-executor transformation for efficient pipelining of loops with conditionals
201311Software-based register file vulnerability reduction for embedded processorsLee, Jongeun; Shrivastava, AviralARTICLE275 Software-based register file vulnerability reduction for embedded processors
201310Architecture Customization of On-Chip Reconfigurable AcceleratorsYoon, Jonghee W.; Lee, Jongeun; Park, Sanghyun, et alARTICLE264 Architecture Customization of On-Chip Reconfigurable Accelerators
201207Return Data Interleaving for Multi-Channel Embedded CMPs SystemsHong, Fei; Shrivastava, Aviral; Lee, JongeunARTICLE320 Return Data Interleaving for Multi-Channel Embedded CMPs Systems
201207PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded SystemsLee, Jongeun; Shrivastava, AviralARTICLE284 PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems
201201Improving Performance of Nested Loops on Reconfigurable Array ProcessorsKim, Yongjoo; Lee, Jongeun; Mai, Toan X., et alARTICLE320 Improving Performance of Nested Loops on Reconfigurable Array Processors
201111High Throughput Data Mapping for Coarse-Grained Reconfigurable ArchitecturesKim, Yongjoo; Lee, Jongeun; Shrivastava, Aviral, et alARTICLE282 High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures
201110Memory Access Optimization in Compilation for Coarse-Grained Reconfigurable ArchitecturesKim, Yongjoo; Lee, Jongeun; Shrivastava, Aviral, et alARTICLE324 Memory Access Optimization in Compilation for Coarse-Grained Reconfigurable Architectures
201105Fast graph-based instruction selection for multi-output instructionsYoun, Jonghee M.; Lee, Jongwon; Paek, Yunheung, et alARTICLE292 Fast graph-based instruction selection for multi-output instructions
201104Static Analysis of Register File VulnerabilityLee, Jongeun; Shrivastava, AviralARTICLE269 Static Analysis of Register File Vulnerability
201009Binary acceleration using coarse-grained reconfigurable architecturePaek, Jong Kyung; Choi, Kiyoung; Lee, JongeunARTICLE314 Binary acceleration using coarse-grained reconfigurable architecture
201007A Compiler-Microarchitecture Hybrid Approach to Soft Error Reduction for Register FilesLee, Jongeun; Shrivastava, A.ARTICLE319 A Compiler-Microarchitecture Hybrid Approach to Soft Error Reduction for Register Files
201004Cache Vulnerability Equations for Protecting Data in Embedded Processor Caches from Soft ErrorsShrivastava, Aviral; Lee, Jongeun; Jeyapaul, ReileyARTICLE323 Cache Vulnerability Equations for Protecting Data in Embedded Processor Caches from Soft Errors

MENU