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Lee, Kyuho Jason
Intelligent Systems Lab.
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dc.citation.conferencePlace US -
dc.citation.conferencePlace San Francisco -
dc.citation.endPage 272 -
dc.citation.startPage 270 -
dc.citation.title IEEE International Solid-State Circuits Conference -
dc.contributor.author Seong, Taeho -
dc.contributor.author Lee, Yongsun -
dc.contributor.author Hwang, Chanwoong -
dc.contributor.author Lee, Jeonghyun -
dc.contributor.author Park, Hangi -
dc.contributor.author Lee, Kyuho Jason -
dc.contributor.author Choi, Jaehyouk -
dc.date.accessioned 2024-01-31T23:07:38Z -
dc.date.available 2024-01-31T23:07:38Z -
dc.date.created 2020-05-06 -
dc.date.issued 2020-02-18 -
dc.description.abstract Despite their superiority in silicon integration, ring-oscillator-based digital PLLs (RO-DPLLs) are seldom used for mobile transceivers because they have difficulty in meeting key requirements, such as low phase noise (PN) and high-frequency resolution. Due to the dilemma of setting the optimal bandwidth, considering the ΔΣM noise and the ring DCO poor PN, conventional ΔΣM-based fractional-N RODPLLs are limited in their ability to achieve low PN. To address this issue, the use of a digital-to-time-converter (DTC) to cancel the quantization noise (Q-noise) has become a general trend [1]. Figure 17.3.1 shows that, using a DTC that generates τDTC according to the control word of the DTC, DDCW, these DPLLs can have a wide bandwidth, thereby significantly suppressing the DCO PN. However, the problem is that any nonlinearity in the loop could cause a significant increase in fractional spurs. In practice, the DTC is the major source of this nonlinearity, so one solution is to improve its linearity by pre-distorting DDCW for its own characteristics, fDTC(x), [2], but this increases the design complexity. Another method is to use a
successive requantizer (SR) as a quantizer (instead of a ΔΣΜ) [3]. The SR can mitigate fractional spurs despite the nonlinearity of the DTC, but the DTC must have a larger dynamic range than the ΔΣΜ with the same order.
This work presents a method for suppressing fractional spurs by modulating DDCW properly before it interacts with the DTC nonlinearity. The concept of this work is from [4] that showed that if the expected value of an arbitrary analog or digital signal X, E[X](t), is constant over time, the power spectral density (PSD) of X shows no spurious tones. This leads to the idea that, if we can modulate DDCW such that its probability density function (PDF) is time-invariant, E[τDTC](t) becomes constant over time even after passing a nonlinear fDTC(DDCW), so the PSD of τDTC has no fractional spurs. To implement this idea, we designed a timeinvariant probability modulator (TIPM) to convert the accumulated ΔΣΜ code, DAQ, to DDCW, of which the PDF[DDCW] is time-invariant. As a result, the RO-DPLL using the proposed TIPM can achieve very low fractional spurs, while achieving low PN with a wide bandwidth.
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dc.identifier.bibliographicCitation IEEE International Solid-State Circuits Conference, pp.270 - 272 -
dc.identifier.doi 10.1109/ISSCC19947.2020.9062948 -
dc.identifier.issn 2376-8606 -
dc.identifier.scopusid 2-s2.0-85083833363 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/78580 -
dc.identifier.url https://ieeexplore.ieee.org/document/9062948 -
dc.language 영어 -
dc.publisher IEEE International Solid-State Circuits Conference -
dc.title A −58dBc-Worst-Fractional-Spur and −234dB-FoMjitter, 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control Word -
dc.type Conference Paper -
dc.date.conferenceDate 2020-02-16 -

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