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정지훈

Jung, Jee-Hoon
Advanced Power Interface & Power Electronics Lab.
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Current Limiter Circuit to Suppress Inrush Load Current for LVDC Distribution System

Author(s)
Jeon, ChanoJeong, WonsikHeo, KyungwookKim, MinaJung, Jee-Hoon
Issued Date
2023-05-24
DOI
10.23919/ICPE2023-ECCEAsia54778.2023.10213632
URI
https://scholarworks.unist.ac.kr/handle/201301/67844
Citation
International Conference on Power Electronics, pp.3074 - 3079
Abstract
This paper proposes an analysis of the inrush load current and a design of the inrush current limiter circuit for a low-voltage DC (LVDC) distribution system. Due to the absence of a zero-crossing point, large fault current during the connection of DC loads with a large input capacitor may cause severe problems in the LVDC distribution system including voltage drop on the DC bus and damage to the system. To analyze the necessity of a current limiter circuit, the voltage control system of a TAB converter for the LVDC distribution system is designed. The stability under the inrush current is analyzed through the small-signal modeling of the TAB converter. Also, the inrush current limiter circuit composed of a switch, a diode, and an inductor is proposed. To obtain the desired current suppression performance, the design methodology is presented. The validity of the proposed inrush current limiter is verified by a lab-level LVDC distribution system with a 4-kW TAB converter prototype.
Publisher
Institute of Electrical and Electronics Engineers Inc.

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