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윤태식

Yoon, Tae-Sik
Nano Semiconductor Research Lab.
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dc.citation.number 2 -
dc.citation.title NANOTECHNOLOGY -
dc.citation.volume 30 -
dc.contributor.author Beom, Keonwon -
dc.contributor.author Yang, Paul -
dc.contributor.author Park, Daehoon -
dc.contributor.author Kim, Hyung Jun -
dc.contributor.author Lee, Hyun Ho -
dc.contributor.author Kang, Chi Jung -
dc.contributor.author Yoon, Tae-Sik -
dc.date.accessioned 2023-12-21T19:39:49Z -
dc.date.available 2023-12-21T19:39:49Z -
dc.date.created 2021-02-25 -
dc.date.issued 2019-01 -
dc.description.abstract We demonstrate single- and double-gate synaptic operations of a thin-film transistor (TFT) with double-gate stack consisting of an Al-top-gate/SiOx/TaOx/n-IGZO on a SiO2/n(+)-Si-bottom-gate substrate. This synaptic TFT exhibits a tunable drain current, mimicking synaptic weight modulation in the biological synapse, upon repeatedly applying gate and drain voltages. The drain current modulation features are analog, voltage-polarity dependently reversible, and strong with a dynamic range of multiple orders of magnitude (similar to 10(4)). These features occur as a consequence of the changes in mobility of the IGZO channel, gate insulator capacitance, and threshold voltage. The drain current modulation responsive to the timing of the voltage application emulates synaptic potentiation, depression, paired-pulse facilitation, and memory transition behaviors depending on the voltage pulse amplitude, width, repetition number, and interval between pulses. The synaptic motions can be realized also by a double-gate operation that separately tunes the channel conductance by top-gate biasing and senses it by bottom-gate biasing. It provides the modulated synaptic weight with a wide level of synaptic weight through the read condition using a bottom-gate stack without read- disturbance. These results verify the potential application of TaOx/IGZO with single- and double-gate operations to artificial synaptic devices. -
dc.identifier.bibliographicCitation NANOTECHNOLOGY, v.30, no.2 -
dc.identifier.doi 10.1088/1361-6528/aae8d2 -
dc.identifier.issn 0957-4484 -
dc.identifier.scopusid 2-s2.0-85056387081 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/50198 -
dc.identifier.wosid 000449176100001 -
dc.language 영어 -
dc.publisher IOP PUBLISHING LTD -
dc.title Single- and double-gate synaptic transistor with TaOx gate insulator and IGZO channel layer -
dc.type Article -
dc.description.isOpenAccess FALSE -
dc.relation.journalWebOfScienceCategory Nanoscience & Nanotechnology; Materials Science, Multidisciplinary; Physics, Applied -
dc.relation.journalResearchArea Science & Technology - Other Topics; Materials Science; Physics -
dc.type.docType Article -
dc.description.journalRegisteredClass scie -
dc.description.journalRegisteredClass scopus -
dc.subject.keywordAuthor synaptic transistor -
dc.subject.keywordAuthor single-gate -
dc.subject.keywordAuthor double-gate -
dc.subject.keywordAuthor tantalum oxide -
dc.subject.keywordAuthor IGZO -
dc.subject.keywordPlus THIN-FILM TRANSISTORS -
dc.subject.keywordPlus OXIDE SEMICONDUCTOR -
dc.subject.keywordPlus MEMORY -
dc.subject.keywordPlus PLASTICITY -
dc.subject.keywordPlus MEMRISTORS -
dc.subject.keywordPlus CONDUCTION -

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