dc.citation.endPage |
1558 |
- |
dc.citation.number |
24 |
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dc.citation.startPage |
1556 |
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dc.citation.title |
ELECTRONICS LETTERS |
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dc.citation.volume |
38 |
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dc.contributor.author |
Chang, JJ |
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dc.contributor.author |
Abrams, M |
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dc.contributor.author |
Kim, Y |
- |
dc.contributor.author |
Bien, Franklin |
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dc.contributor.author |
Lee, Myunghee |
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dc.date.accessioned |
2023-12-22T11:36:38Z |
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dc.date.available |
2023-12-22T11:36:38Z |
- |
dc.date.created |
2014-06-05 |
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dc.date.issued |
2002-11 |
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dc.description.abstract |
A signal detect/loss of signal (SD/LOS) circuit for a four-channel parallel TX/RX chip was designed and fabricated in a 0.35 mum SiGe HBT process. The measurement was performed in power supply range (3.0-3.6 V) and case temperatures (0-100degreesC) under the influence of cross-talk from the other RX channels and transmitter channels. The result shows a typical assert level of -20.5 dBm and a de-assert level of -21.5 dBm with a typical hysteresis of 1 dB. |
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dc.identifier.bibliographicCitation |
ELECTRONICS LETTERS, v.38, no.24, pp.1556 - 1558 |
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dc.identifier.doi |
10.1049/el:20021083 |
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dc.identifier.issn |
0013-5194 |
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dc.identifier.scopusid |
2-s2.0-0037153511 |
- |
dc.identifier.uri |
https://scholarworks.unist.ac.kr/handle/201301/4902 |
- |
dc.identifier.url |
http://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=0037153511 |
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dc.identifier.wosid |
000179749100045 |
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dc.language |
영어 |
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dc.publisher |
INST ENGINEERING TECHNOLOGY-IET |
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dc.title |
Four-channel parallel 3.125 Gbit/s/ch/s fibre optic receiver/transmitter chip signal detection circuit |
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dc.type |
Article |
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dc.description.journalRegisteredClass |
scopus |
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