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장지원

Chang, Jiwon
Exploratory Device Research Lab.
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A 2D material-based floating gate device with linear synaptic weight update

Author(s)
Park, EunpyoKim, MinkyungKim, Tae SooKim, In SooPark, JongkilKim, JaewookJeong, YeonJooLee, SuyounKim, InhoPark, Jong-KeukKim, Gyu TaeChang, JiwonKang, KibumKwak, Joon Young
Issued Date
2020-12
DOI
10.1039/D0NR07403A
URI
https://scholarworks.unist.ac.kr/handle/201301/49006
Fulltext
https://pubs.rsc.org/en/content/articlelanding/2020/NR/D0NR07403A#!divAbstract
Citation
NANOSCALE, v.12, no.48, pp.24503 - 24509
Abstract
Neuromorphic computing is of great interest among researchers interested in overcoming the von Neumann computing bottleneck. A synaptic device, one of the key components to realize a neuromorphic system, has a weight that indicates the strength of the connection between two neurons, and updating this weight must have linear and symmetric characteristics. Especially, a transistor-type device has a gate terminal, separating the processes of reading and updating the conductivity, used as a synaptic weight to prevent sneak path current issues during synaptic operations. In this study, we fabricate a top-gated flash memory device based on two-dimensional (2D) materials, MoS2 and graphene, as a channel and a floating gate, respectively, and Al2O3 and HfO2 to increase the tunneling efficiency. We demonstrate the linear weight updates and repeatable characteristics of applying negative/positive pulses, and also emulate spike timing-dependent plasticity (STDP), one of the learning rules in a spiking neural network (SNN).
Publisher
ROYAL SOC CHEMISTRY
ISSN
2040-3364
Keyword
MONOLAYER MOS2MEMORYGRAPHENEARRAY

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