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Bien, Franklin
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0.18-mu m CMOS equalization techniques for 10-Gb/s fiber optical communication links

Author(s)
Maeng, MBien, FranklinHur, YKim, HChandramouli, SGebara, ELaskar, J
Issued Date
2005-11
DOI
10.1109/TMTT.2005.857108
URI
https://scholarworks.unist.ac.kr/handle/201301/4895
Fulltext
http://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=28144434187
Citation
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.53, no.11, pp.3509 - 3519
Abstract
Limitations in data transmission caused by modal dispersion in fiber-optic links can be significantly improved using equalization techniques. In this paper, two different equalizer implementation approaches are proposed to extend the transmission capacities of existing fiber-optic links. The building blocks of the equalizer including a multiplier cell, a delay line, and an output buffer stage are fully integrated on a 0.18-μm CMOS process. For the continuous-time tap-delay implementation, a passive LC delay line and an active inductance peaking delay line are compared for performance against process variation, as well as power consumption. In addition, a delay-locked loop is proposed to counter delay variations caused by changes in the process corner. A 10-Gb/s nonreturn-to-zero signal is received after transmission through a 500-m multimode-fiber channel, and the signal impairment due to the differential modal delay is successfully compensated using both feed-forward equalizers.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
ISSN
0018-9480
Keyword (Author)
active inductive peakingdelay-locked loop (DLL)equalizationfeed-forward equalizer (FFE)finite impulse response (FIR) filterinput/output (I/O) interconnectionLC laddermultimode fiber (MMF)nonreturn to zero (NRZ)10-Gb/s0.18-mu m CMOS
Keyword
BANDWIDTH-DISTANCE PRODUCTSYSTEMSCOMPENSATION

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