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Bien, Franklin
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Fully Integrated 0.18um CMOS equalizer with an active inductance peaking delay line for 10Gbps data throughput over 500m multimode fiber

Author(s)
Bien, FranklinMaeng, MHur, YChandramouli, SKim, HChun, CGebara, ELaskar, J
Issued Date
2005-06-12
DOI
10.1109/MWSYM.2005.1517088
URI
https://scholarworks.unist.ac.kr/handle/201301/46881
Fulltext
https://ieeexplore.ieee.org/document/1517088
Citation
IEEE MTT-S International Microwave Symposium, pp.1845 - 1848
Abstract
In this paper, we present a fully integrated equalizer for 10Gbps data throughput over multimode fiber. The equalizer uses a newly proposed active delay line approach with an active inductance. The active inductance enables 10Gbps data throughput equalization with an integrated single to differential converter. A buffer stage is also integrated at the output stage to deliver Low Voltage Differential Signaling (LVDS) level at the 50-ohm termination. The overall architecture is implemented using a 0.18um, standard CMOS process with a 1.8V supply voltage. The active delay line scheme results in reduced equalizer chip area in comparison to a passive delay line approach. The 10Gbps Non Return-to-Zero (NRZ) signal is received through a 500m multimode fiber channel, and the signal impairment due to the differential mode delay is successfully compensated.
Publisher
IEEE Microwave Theory & Techno
ISSN
0149-645X

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