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Kim, Jingook
Integrated Circuit and Electromagnetic Compatibility Laboratory (IC & EMC Lab)
Research Interests
  • Convergence between circuit and EM domains

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Capacitance calculation for via structures using an integral equation method based on partial capacitance

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Title
Capacitance calculation for via structures using an integral equation method based on partial capacitance
Author
Wang, HanfengPan, SimingKim, JingookRuehli, Albert E.Fan, Jun
Keywords
Equation method; image theory; integral shared-antipad; partial capacitance; via-to-plane capacitance
Issue Date
201312
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.3, no.12, pp.2134 - 2146
Abstract
In this paper, a new integral equation formulation for via structures is developed for the capacitance extraction between vias and planes. The formulation is initially developed for axially symmetric geometries and then extended to axially asymmetric geometries by changing the circular ring cells to arc cells. The extended method can be used to calculate the shared-antipad via structure, which is widely used in high-speed differential signal interconnects. In addition, the image theory is used to handle inhomogeneous media, and a new technique is given to reduce computational costs for via-to-plane structures based on properties of the capacitance-matrix elements. The proposed method is validated with a commercial finite element method-based tool for several practical via structures. The extracted capacitance is also incorporated into the physics-based via model and validated with full-wave simulations.
URI
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DOI
http://dx.doi.org/10.1109/TCPMT.2013.2272323
ISSN
2156-3950
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ECE_Journal Papers

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