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Lee, Jongeun
Intelligent Computing and Codesign Lab.
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Techniques for Improving Coarse-Grained Reconfigurable Architectures

Author(s)
Han, KyuseungPark, SeongsikChoi, KiyoungPaek, Jong KyungLee, Jongeun
Issued Date
2011-08-07
DOI
10.1109/MWSCAS.2011.6026299
URI
https://scholarworks.unist.ac.kr/handle/201301/37562
Fulltext
https://ieeexplore.ieee.org/document/6026299/
Citation
54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
Abstract
This paper presents various novel techniques for improving coarse-grained reconfigurable architectures. Specifically, it presents techniques for supporting IEEE single precision floating-point standard, efficient handling of loop-carried dependency with variable-length FIFOs, efficient mapping of control flows, and sharing data with a host processor for transparent binary acceleration. Experiments with benchmark examples demonstrate the effectiveness of the proposed techniques.
Publisher
IEEE
ISBN
978-161284857-0
ISSN
1548-3746

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