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| DC Field | Value | Language |
|---|---|---|
| dc.citation.conferencePlace | US | - |
| dc.citation.conferencePlace | DoubleTree by HiltonSan Jose | - |
| dc.citation.endPage | 14 | - |
| dc.citation.startPage | 11 | - |
| dc.citation.title | 24th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS 2015) | - |
| dc.contributor.author | Han, Ki Jin | - |
| dc.contributor.author | Sandeep, Srikumar | - |
| dc.contributor.author | Martin, Bill | - |
| dc.contributor.author | Swaminathan, Madhavan | - |
| dc.date.accessioned | 2023-12-19T21:39:13Z | - |
| dc.date.available | 2023-12-19T21:39:13Z | - |
| dc.date.created | 2016-01-12 | - |
| dc.date.issued | 2015-10-25 | - |
| dc.description.abstract | In this paper an algorithm is described for obtaining the response of Power Distribution Networks (PDN) arising in chip, package or pcb during an early design phase. Results are provided for power grids arising in silicon interposers to validate the approach. | - |
| dc.identifier.bibliographicCitation | 24th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS 2015), pp.11 - 14 | - |
| dc.identifier.doi | 10.1109/EPEPS.2015.7347119 | - |
| dc.identifier.scopusid | 2-s2.0-84962852769 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/35472 | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/7347119 | - |
| dc.language | 영어 | - |
| dc.publisher | IEEE | - |
| dc.title | Modeling of Power Distribution Networks for Path Finding | - |
| dc.type | Conference Paper | - |
| dc.date.conferenceDate | 2015-10-25 | - |
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