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DC Field | Value | Language |
---|---|---|
dc.citation.endPage | 1193 | - |
dc.citation.number | 14 | - |
dc.citation.startPage | 1192 | - |
dc.citation.title | ELECTRONICS LETTERS | - |
dc.citation.volume | 33 | - |
dc.contributor.author | Son, JW | - |
dc.contributor.author | Lee, HT | - |
dc.contributor.author | Oh, YY | - |
dc.contributor.author | Lee, Jaiyong | - |
dc.contributor.author | Lee, SB | - |
dc.date.accessioned | 2023-12-22T12:37:11Z | - |
dc.date.available | 2023-12-22T12:37:11Z | - |
dc.date.created | 2020-05-12 | - |
dc.date.issued | 1997-07 | - |
dc.description.abstract | A switch architecture is proposed for alleviating the HOL blocking by employing even/odd dual FIFO queues at each input and even/odd dual switching planes dedicated to each even/odd queue. Under random traffic, it gives 76.4% throughput without output expansion and 100% with output expansion r = 2, with the same amount of crosspoints as for the ordinary output expansion scheme. | - |
dc.identifier.bibliographicCitation | ELECTRONICS LETTERS, v.33, no.14, pp.1192 - 1193 | - |
dc.identifier.doi | 10.1049/el:19970837 | - |
dc.identifier.issn | 0013-5194 | - |
dc.identifier.scopusid | 2-s2.0-0031551180 | - |
dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/32128 | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/603563/?arnumber=603563&tag=1 | - |
dc.identifier.wosid | A1997XM12800006 | - |
dc.language | 영어 | - |
dc.publisher | IEE-INST ELEC ENG | - |
dc.title | Performance of an input-queued ATM switch with even/odd switching planes | - |
dc.type | Article | - |
dc.description.isOpenAccess | FALSE | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalResearchArea | Engineering | - |
dc.type.docType | Article | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordAuthor | asynchronous transfer mode | - |
dc.subject.keywordAuthor | switching systems | - |
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