Trapezoidal approximation for on-current modeling of 45-nm non-rectilinear gate shape
Cited 0 times inCited 0 times in
- Trapezoidal approximation for on-current modeling of 45-nm non-rectilinear gate shape
- Ryu, Myunghwan; Kim, Youngmin
- Effective length; Effective width; NRG; Post-lithography simulation; TCAD
- Issue Date
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
- IEICE ELECTRONICS EXPRESS, v.10, no.11, pp.1 - 10
- In this paper, a simple and accurate modeling technique that analyzes a non-rectilinear gate (NRG) transistor with a simplified trapezoidal approximation method is proposed. To approximate a non-rectangular channel shape into a trapezoidal shape, we extract three geometry-dependent parameters from post-lithographic patterns: the minimum channel length from the slices (Lmin), maximum channel length from the slices (Lmax), and effective channel width (Weff). We slice the NRG transistor gate along its width, sort these slices according to their sizes, and then use trapezoidal approximation. A physics-based technology computer aided design (TCAD) simulation is used to verify our model in a typical 45-nm process. The developed model requires fewer computations and less runtime as compared to the previous approaches. Therefore, a full chip post-lithography analysis (PLA) becomes feasible.
- ; Go to Link
Appears in Collections:
- ECE_Journal Papers
- Files in This Item:
can give you direct access to the published full text of this article. (UNISTARs only)
Show full item record
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.