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Kim, Jin Young
Next Generation Energy Laboratory
Research Interests
  • Polymer solar cells, QD solar cells, organic-inorganic hybrid solar cells, perovskite solar cells, OLEDs, PeLEDs, organic FETs

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Implementation of Low-Power Electronic Devices Using Solution-Processed Tantalum Pentoxide Dielectric

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Title
Implementation of Low-Power Electronic Devices Using Solution-Processed Tantalum Pentoxide Dielectric
Author
Heo, JungwooPark, Song YiKim, Jae WonSong, SeyeongYoon, Yung JinJeong, JaekiJang, HyungsuLee, Kang TaekSeo, Jung HwaWalker, BrightKim, Jin Young
Keywords
field‐ effect transistors;  high‐ κ;  solution‐ processing;  tantalum oxide;  thin film transistors
Issue Date
201807
Publisher
WILEY-V C H VERLAG GMBH
Citation
ADVANCED FUNCTIONAL MATERIALS, v.28, no.28, pp.1704215 -
Abstract
The development of solution-processed field effect transistors (FETs) based on organic and hybrid materials over the past two decades has demonstrated the incredible potential in these technologies. However, solution processed FETs generally require impracticably high voltages to switch on and off, which precludes their application in low-power devices and prevent their integration with standard logic circuitry. Here, a universal and environmentally benign solution-processing method for the preparation of Ta2O5, HfO2 and ZrO2 amorphous dielectric thin films is demonstrated. High mobility CdS FETs are fabricated on such high-kappa dielectric substrates entirely via solution-processing. The highest mobility, 2.97 cm(2) V-1 s(-1) is achieved in the device with Ta2O5 dielectric with a low threshold voltage of 1.00 V, which is higher than the mobility of the reference CdS FET with SiO2 dielectric with an order of magnitude decrease in threshold voltage as well. Because these FETs can be operated at less than 5 V, they may potentially be integrated with existing logic and display circuitry without significant signal amplification. This report demonstrates high-mobility FETs using solution-processed Ta2O5 dielectrics with drastically reduced power consumption; approximate to 95% reduction compared to that of the device with a conventional SiO2 gate dielectric.
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DOI
http://dx.doi.org/10.1002/adfm.201704215
ISSN
1616-301X
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