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DC Field | Value | Language |
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dc.citation.number | 1 | - |
dc.citation.startPage | 5 | - |
dc.citation.title | ACM TRANSACTIONS ON STORAGE | - |
dc.citation.volume | 14 | - |
dc.contributor.author | Kim, Wook-Hee | - |
dc.contributor.author | Seo, Jihye | - |
dc.contributor.author | Kim, Jinwoong | - |
dc.contributor.author | Nam, Beomseok | - |
dc.date.accessioned | 2023-12-21T21:07:33Z | - |
dc.date.available | 2023-12-21T21:07:33Z | - |
dc.date.created | 2018-03-27 | - |
dc.date.issued | 2018-03 | - |
dc.description.abstract | Emerging byte-addressable non-volatile memory (NVRAM) is expected to replace block device storages as an alternative low-latency persistent storage device. If NVRAM is used as a persistent storage device, a cache line instead of a disk page will be the unit of data transfer, consistency, and durability. In this work, we design and develop clfB-tree—a B-tree structure whose tree node fits in a single cache line. We employ existing write combining store buffer and restricted transactional memory to provide a failure-atomic cache line write operation. Using the failure-atomic cache line write operations, we atomically update a clfB-tree node via a single cache line flush instruction without major changes in hardware. However, there exist many processors that do not provide SW interface for transactional memory. For those processors, our proposed clfB-tree achieves atomicity and consistency via in-place update, which requires maximum four cache line flushes. We evaluate the performance of clfB-tree on an NVRAM emulation board with ARM Cortex A-9 processor and a workstation that has Intel Xeon E7-4809 v3 processor. Our experimental results show clfB-tree outperforms wB-tree and CDDS B-tree by a large margin in terms of both insertion and search performance. | - |
dc.identifier.bibliographicCitation | ACM TRANSACTIONS ON STORAGE, v.14, no.1, pp.5 | - |
dc.identifier.doi | 10.1145/3129263 | - |
dc.identifier.issn | 1553-3077 | - |
dc.identifier.scopusid | 2-s2.0-85042936056 | - |
dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/23900 | - |
dc.identifier.url | https://dl.acm.org/citation.cfm?doid=3190860.3129263 | - |
dc.identifier.wosid | 000433517600005 | - |
dc.language | 영어 | - |
dc.publisher | ASSOC COMPUTING MACHINERY | - |
dc.title | clfB-tree: Cacheline friendly persistent B-tree for NVRAM | - |
dc.type | Article | - |
dc.description.isOpenAccess | FALSE | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture; Computer Science, Software Engineering | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordAuthor | Data structure | - |
dc.subject.keywordAuthor | Non-volatile memory | - |
dc.subject.keywordAuthor | Persistent indexing | - |
dc.subject.keywordPlus | MEMORY | - |
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