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Kim, Hak Sun
Internet of Things System Lab.
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Analysis and Design of Fully Integrated High-Power Parallel-Circuit Class-E CMOS Power Amplifiers

Author(s)
Lee, OckgooAn, Kyu HwanKim, HyungwookLee, Dong HoHan, JeonghuYang, Ki SeokLee, Chang-HoKim, HaksunLaskar, Joy
Issued Date
2010-03
DOI
10.1109/TCSI.2009.2023944
URI
https://scholarworks.unist.ac.kr/handle/201301/21537
Fulltext
http://ieeexplore.ieee.org/document/5061569/
Citation
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.57, no.3, pp.725 - 734
Abstract
A design methodology for watt-level, fully integrated CMOS power amplifiers (PAs) is presented. It is based on the analysis of the operation and power loss mechanism of class-E PAs, which includes the effects of a finite dc-feed inductance and an impedance matching transformer. Using the proposed approach, a class-E PA with a 2 x 1:2 step-up on-chip transformer was implemented in a 0.18-mu m CMOS technology. With a 3.3 V supply, the fully integrated PA achieves an output power of 2 W and a power-added efficiency of 31% at 1.8 GHz.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
ISSN
1549-8328

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