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153 fsRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier File

Choi, Seojin , Yoo, Seyeon , Lee, Yongsun , Jo, Yongwoo , Lee, Jeonghyun , Lim, Younghyun , Choi, Jaehyouk

Conference Paper Issue Date2018-06-20 View6
A 0.56-2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2G-4G Multistandard Cellular Transceivers File

Yoon, Heein , Lee, Youngsun , Lim, Younghyun , Tak, Guemyoung , Kim, Hongdeuk , Ho, Yocheol , Choi, Jaehyouk

Article Issue Date2016-03 View8
A 0.5V-VIN, 0.29ps-Transient-FOM, and Sub-2mV-Accuracy Adaptive-Sampling Digital LDO Using Single-VCO-Based Edge-Racing Time Quantizer File

Lee, Jeonghyun , Bang, Jooeun , Lim, Younghyun , Choi, Jaehyouk

Conference Paper Issue Date2019-06-09 View5
A 140fs rms -Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator File

Yoo, Seyeon , Choi, Seojin , Lee, Yongsun , Seong, Taeho , Lim, Younghyun , Choi, Jaehyouk

Conference Paper Issue Date2019-02-17 View3
A 170MHz-Lock-In-Range and −253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator File

Lim, Younghyun , Kim, Juyeop , Jo, Yongwoo , Bang, Jooeun , Yoo, Seyeon , Park, Hangi , Yoon, Heein , Choi, Jaehyouk

Conference Paper Issue Date2020-02-16 View11
A 320μV-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector File

Lim, Younghyun , Lee, Jeonghyun , Lee, Yongsun , Yoo, Seyeon , Choi, Jaehyouk

Conference Paper Issue Date2018-09-03 View4
A 65-nm CMOS 2 x 2 MIMO Multi-Band LTE RF Transceiver for Small Cell Base Stations File

Lim, Kyoohyun , Lee, Sanghoon , Lee, Yongha , Moon, Byeongmoo , Shin, Hwahyeong , Kang, Kisub , Kim, Sungbeom , Lee, Jihyeok , Lee, Hyungsuk , Shim, Hyunchul , et al

Article Issue Date2018-07 View2
A 76fs rms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization File

Kim, Juyeop , Yoon, Heein , Lim, Younghyun , Lee, Yongsun , Cho, Yoonseo , Seong, Taeho , Choi, Jaehyouk

Conference Paper Issue Date2019-02-17 View10
A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator File

Yoo, Seyeon , Choi, Seojin , Lee, Yongsun , Seong, Taeho , Lim, Younghyun , Choi, Jaehyouk

Article Issue Date2021-01 View3
A performance analysis for interconnections of 3D ICs with frequency-dependent TSV model in S-parameter File

Han, Ki Jin , Lim, Younghyun , Kim, Youngmin

Article Issue Date2014-10 View4
A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier with a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector File

Choi, Seojin , Yoo, Seyeon , Lim, Younghyun , Choi, Jaehyouk

Article Issue Date2016-08 View6
A −31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers File

Yoon, Heein , Kim, Juyeop , Park, Suneui , Lim, Younghyun , Lee, Yongsun , Bang, Jooeun , Lim, Kyoohyun , Choi, Jaehyouk

Conference Paper Issue Date2018-02-14 View6
An extemal-capacitor-less low-dropout regulator with less than -36dB PSRR at all frequencies from 10kHz to 1GHz using an adaptive supply-ripple cancellation technique to the body-gate File

Lim, Younghyun , Lee, Jeonghyun , Park, Suneui , Choi, Jaehyouk

Conference Paper Issue Date2017-05-03 View4
An External Capacitor-Less Ultralow-Dropout Regulator Using a Loop-Gain Stabilizing Technique for High Power-Supply Rejection Over a Wide Range of Load Current File

Lim, Younghyun , Lee, Jeonghyun , Lee, Yongsun , Song, Seong-Sik , Kim, Hong-Teuk , Lee, Ockgoo , Choi, Jaehyouk

Article Issue Date2017-11 View5
An External Capacitorless Low-Dropout Regulator With High PSR at All Frequencies From 10 kHz to 1 GHz Using an Adaptive Supply-Ripple Cancellation Technique File

Lim, Younghyun , Lee, Jeonghyun , Park, Suneui , Jo, Yongwoo , Choi, Jaehyouk

Article Issue Date2018-09 View5
An external-capacitor-less high-PSR low-dropout regulator using an adaptive supply-ripple cancellation technique to the body-gate File

Lim, Younghyun , Lee, Jeonghyun , Park, Suneui , Choi, Jaehyouk

Conference Paper Issue Date2018-01-22 View4
An Ultra-Low-Jitter 22.8-GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114 File

Choi, Seojin , Yoo, Seyeon , Lee, Yongsun , Jo, Yongwoo , Lee, Jeongyun , Lim, Younghyun , Choi, Jaehyouk

Article Issue Date2019-04 View3
An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators File

Kim, Juyeop , Lim, Younghyun , Yoon, Heein , Lee, Yongsun , Park, Hangi , Cho, Yoonseo , Seong, Taeho , Choi, Jaehyouk

Article Issue Date2019-12 View10
MULTI-PHYSICAL MICROFLUIDIC APPROACHES FOR PARTICLE MANIPULATION AND TRIBOELECTRIC SENSING File

Lim, Younghyun

Thesis Issue Date2021-02 View3
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