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Fast chip-package-PCB coanalysis methodology for power integrity of multi-domain high-speed memory: A case study File

Kim, Seungwon , Han, Ki Jin , Kim, Youngmin , Kang, Seokhyeong

Conference Paper Issue Date2018-03-19 View4

Identification of Parameter Domain for the Design of High-Speed I/O Interface File

Kim, Seungwon , Kim, Youngmin , Han, Ki Jin

Conference Paper Issue Date2015-12-15 View4

Impacts of Trapezoidal Fin of 20-nm Double-Gate FinFET on the Electrical Characteristics of Circuits File

Ryu, Myunghwan , Kim, Youngmin

Article Issue Date2015-08 View5

In Situ Electrochemical Activation of Atomic Layer Deposition Coated MoS2 Basal Planes for Efficient Hydrogen Evolution Reaction File

Kim, Youngmin , Jackson, David H. K. , Lee, Daewon , Choi, Min , Kim, Tae-Wan , Jeong, Soon-Yong , Chae, Ho-Jeong , Kim, Hyun Woo , Park, Noejung , Chang, Hyunju , et al

Article Issue Date2017-09 View5

In situ electrochemically synthesized Pt-MoO3-x nanostructure catalysts for efficient hydrogen evolution reaction File File

Lee, Daewon , Kim, Youngmin , Kim, Hyun Woo , Choi, Min , Park, Noejung , Chang, Hyunju , Kwon, Youngkook , Park, Jong Hyeok , Kim, Hyung Ju

Article Issue Date2020-01 View4

Inverted Layer-By-Layer Fabrication of an Ultraflexible and Transparent Ag Nanowire/Conductive Polymer Composite Electrode for Use in High-Performance Organic Solar Cells File

Kim, Youngmin , Ryu, Tae In , Ok, Ki-Hoon , Kwak, Min-Gi , Park, Sungmin , Park, Nam-Gyu , Han, Chul Jong , Kim, Bong Soo , Ko, Min Jae , Son, Hae Jung , et al

Article Issue Date2015-08 View0

Investigation on Formation Process of Lithium-Ion Batteries

Kim, Youngmin , Jeong, Kyeong-Min

Conference Paper Issue Date2019-10-16 View5

Junctionless Sandwiched-gate Logic Design using Novel Device Structure File

Ryu, Myunghwan , Kim, Youngmin

Article Issue Date2018-08 View4

Novel adaptive power-gating strategy and tapered TSV structure in multilayer 3D IC File

Kim, Seung Won , Kang, Seokhyeong , Han, Ki Jin , Kim, Youngmin

Article Issue Date2016-07 View5

Optimal inverter logic gate using 10-nm double gate-all-around (DGAA) transistor with asymmetric channel width File File

Ryu, Myunghwan , Bien, Franklin , Kim, Youngmin

Article Issue Date2016-01 View4

Optimization of analog circuits via simulation and a Lagrangian-type gradient-based method File

Lim, Eunji , Kim, Youngmin , Choi, Jaehyouk

Conference Paper Issue Date2015-12-09 View5

Power Integrity Coanalysis Methodology for Multi-Domain High-Speed Memory Systems File

Kim, Seungwon , Han, Ki Jin , Kim, Youngmin , Kang, Seokhyeong

Article Issue Date2019-07 View1

Sandwiched-Gate Inverter: Novel Device Structure for Future Logic Gates File

Ryu, Myunghwan , Bien, Franklin , Kim, Youngmin

Conference Paper Issue Date2015-09-09 View3

Theory and Practice of Lithium Ion Cell Design

Kim, Youngmin , Sung, Changhun , Baek, In Jun , Na, Hoyoung , Jeong, Kyeong-Min

Conference Paper Issue Date2018-11-30 View5

Unveiling the Role of Electrode-Level Heterogeneity Alleviated in Silicon–Graphite Electrode Under Operando Microscopy File File

Kim, Juyoung , Kim, Min-Ho , Kim, Youngmin , Kim, Myeong Seon , Choi, Ahreum , Jeong, Kyeong-Min , Lee, Hyun-Wook

Article Issue Date2023-03 View22

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